3069RF-ZTAT Datasheet, PDF (491/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

13.2.7 Serial Status Register (SSR)
SSR is an 8-bit register containing multiprocessor bit values, and status flags that indicate the
operating status of the SCI.
Bit
Initial value
Read/Write
7
6
5
4
3
2
TDRE RDRF ORER FER/ERS PER TEND
1
0
0
0
0
1
R/(W)*¹ R/(W)*¹ R/(W)*¹ R/(W)*¹ R/(W)*¹ R
1
MPB
0
R
0
MPBT
0
R/W
Multiprocessor bit
transfer
Value of multiprocessor
bit to be transmitted
Multiprocessor bit
Stores the received
multiprocessor bit value
Transmit end*²
Status flag indicating end of
transmission
Parity error
Status flag indicating detection
of a receive parity error
Framing error (FER)/Error signal status (ERS)*²
Status flag indicating detection of a receive framing
error, or flag indicating detection of an error signal
Overrun error
Status flag indicating detection
of a receive overrun error
Receive data register full
Status flag indicating that data has been received
and stored in RDR
Transmit data register empty
Status flag indicating that transmit data has been transferred from
TDR into TSR and new data can be written in TDR
Notes: 1. Only 0 can be written, to clear the flag.
2. Function differs between the normal serial communication interface and the smart card interface.
The CPU can always read and write SSR, but cannot write 1 in the TDRE, RDRF, ORER, PER,
and FER flags. These flags can be cleared to 0 only if they have first been read while set to 1.
The TEND and MPB flags are read-only bits that cannot be written.
SSR is initialized to H'84 by a reset and in standby mode.
Rev. 5.0, 09/04, page 469 of 978