3069RF-ZTAT Datasheet, PDF (165/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

In byte access, whether the upper or lower data bus is used is determined by whether the address
is even or odd. The upper data bus is used for an even address, and the lower data bus for an odd
address.
Byte size
Byte size
· Even address
· Odd address
Upper data bus
Lower data bus
D₁₅
D₈ D₇
D₀
Word size
Longword size
1st bus cycle
2nd bus cycle
Figure 6.8 Access Sizes and Data Alignment Control (16-Bit Access Area)
6.4.3 Valid Strobes
Table 6.4 shows the data buses used, and the valid strobes, for the access spaces.
In a read, the RD signal is valid for both the upper and the lower half of the data bus.
In a write, the HWR signal is valid for the upper half of the data bus, and the LWR signal for the
lower half.
Rev. 5.0, 09/04, page 143 of 978