3069RF-ZTAT Datasheet, PDF (541/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

Bit 2—Smart Card Data Invert (SINV): Specifies inversion of the data logic level. This
function is used in combination with the SDIR bit to communicate with inverse-convention
cards.*² The SINV bit does not affect the logic level of the parity bit. For parity settings, see
section 14.3.4, Register Settings.
Bit 2
SINV
0
1
Description
Unmodified TDR contents are transmitted
Receive data is stored unmodified in RDR
Inverted TDR contents are transmitted
Receive data is inverted before storage in RDR
(Initial value)
Bit 1—Reserved: Read-only bit, always read as 1.
Bit 0—Smart Card Interface Mode Select (SMIF): Enables the smart card interface function.
Bit 0
SMIF
0
1
Description
Smart card interface function is disabled
Smart card interface function is enabled
(Initial value)
Notes: 1. The function for switching between LSB-first and MSB-first mode can also be used
with the normal serial communication interface. Note that when the communication
format data length is set to 7 bits and MSB-first mode is selected for the serial data to
be transferred, bit 0 of TDR is not transmitted, and only bits 7 to 1 of the received data
are valid.
2. The data logic level inversion function can also be used with the normal serial
communication interface. Note that, when inverting the serial data to be transferred,
parity transmission and parity checking is based on the number of high-level periods at
the serial data I/O pin, and not on the register value.
14.2.2 Serial Status Register (SSR)
The function of SSR bit 4 is modified in smart card interface mode. This change also causes a
modification to the setting conditions for bit 2 (TEND).
Rev. 5.0, 09/04, page 519 of 978