3069RF-ZTAT Datasheet, PDF (713/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

Table 19.3 Clock Timing
Item
V = 5.0 V ± 10%
CC
Symbol Min
Max
External clock input low t
15
—
EXL
pulse width
External clock input high t
15
—
EXH
pulse width
External clock rise time t_EXr
—
5
External clock fall time t_EXf
—
5
Clock low pulse width
t
0.4
0.6
CL
Clock high pulse width t
0.4
0.6
CH
External clock output
t_DEXT*
500
—
settling delay time
Note:
*
t includes a RES pulse width (t ). t = 20 t
DEXT
RESW RESW
cyc
Unit Test Conditions
ns
Figure 19.6
ns
ns
ns
t
Figure 21.13
cyc
t
cyc
µs
Figure 19.7
EXTAL
t_EXH
t_EXL
V_CC × 0.7
0.3 V
t_EXr
t_EXf
Figure 19.6 External Clock Input Timing
V_CC × 0.5
Rev. 5.0, 09/04, page 691 of 978