3069RF-ZTAT Datasheet, PDF (117/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

5.2.4 IRQ Enable Register (IER)
IER is an 8-bit readable/writable register that enables or disables IRQ₅ to IRQ₀ interrupt requests.
Bit
Initial value
Read/Write
7
—
0
R/W
6
5
4
3
2
1
0
— IRQ5E IRQ4E IRQ3E IRQ2E IRQ1E IRQ0E
0
0
0
0
0
0
0
R/W R/W
R/W R/W
R/W R/W R/W
Reserved bits
IRQ ₅ to IRQ₀ enable
These bits enable or disable IRQ ₅ to IRQ ₀ interrupt requests
IER is initialized to H'00 by a reset and in hardware standby mode.
Bits 7 and 6—Reserved: These bits can be written and read, but they do not enable or disable
interrupts.
Bits 5 to 0—IRQ₅ to IRQ₀ Enable (IRQ5E to IRQ0E): These bits enable or disable
IRQ₅ to IRQ₀ interrupt requests.
Bits 5 to 0
IRQ5E to IRQ0E Description
0
IRQ₅ to IRQ₀ interrupt requests are disabled
1
IRQ₅ to IRQ₀ interrupt requests are enabled
(Initial value)
Rev. 5.0, 09/04, page 95 of 978