3069RF-ZTAT Datasheet, PDF (143/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

6.2.4 Bus Release Control Register (BRCR)
BRCR is an 8-bit readable/writable register that enables address output on bus lines A₂₃ to A₂₀ and
enables or disables release of the bus to an external device.
Bit
7
6
5
4
3
2
1
0
A23E A22E A21E A20E
—
—
— BRLE
Modes
1, 2,
Initial value
1
1
1
1
1
1
1
0
and 7 Read/Write —
—
—
—
—
—
—
R/W
Modes ^{Initial value 1}
1
1
0
1
1
1
0
3 and 4 _{Read/Write R/W}
R/W
R/W
—
—
—
—
R/W
Initial value 1
1
1
1
1
1
1
0
Mode 5
Read/Write R/W
R/W
R/W
R/W
—
—
—
R/W
Address 23 to 20 enable
These bits enable PA₇ to PA₄ to be
used for A₂₃ to A₂₀ address output
Reserved bits
Bus release enable
Enables or disables
release of the bus
to an external device
BRCR is initialized to H'FE in modes 1, 2, 5, and 7, and to H'EE in modes 3 and 4, by a reset and
in hardware standby mode. It is not initialized in software standby mode.
Bit 7—Address 23 Enable (A23E): Enables PA₄ to be used as the A₂₃ address output pin.
Writing 0 in this bit enables A₂₃ output from PA₄. In modes other than 3, 4, and 5, this bit cannot
be modified and PA₄ has its ordinary port functions.
Bit 7
A23E
0
1
Description
PA₄ is the A₂₃ address output pin
PA₄ is an input/output pin
(Initial value)
Bit 6—Address 22 Enable (A22E): Enables PA₅ to be used as the A₂₂ address output pin.
Writing 0 in this bit enables A₂₂ output from PA₅. In modes other than 3, 4, and 5, this bit cannot
be modified and PA₅ has its ordinary port functions.
Bit 6
A22E
0
1
Description
PA₅ is the A₂₂ address output pin
PA₅ is an input/output pin
(Initial value)
Rev. 5.0, 09/04, page 121 of 978