3069RF-ZTAT Datasheet, PDF (426/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

10.7.2 Contention between 8TCNT Write and Increment
If an increment pulse occurs in the T₃ state of a 8TCNT write cycle, writing takes priority and
8TCNT is not incremented. Figure 10.19 shows the timing in this case.
8TCNT write cycle
T1
T2
T3
φ
Address bus
8 TCNT address
Internal write signal
8TCNT input clock
8TCNT
N
M
8TCNT write data
Figure 10.19 Contention between 8TCNT Write and Increment
Rev. 5.0, 09/04, page 404 of 978