3069RF-ZTAT Datasheet, PDF (211/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

φ
Address bus
RD
CSn
Bus cycle A Bus cycle B
T1 T2 T3 T1 T2
φ
Address bus
RD
CSn
Bus cycle A Bus cycle B
T1 T2 T3 Ti T1 T2
Simultaneous change of RD and CSn
Possibility of mutual overlap
(a) Idle cycle not inserted
(b) Idle cycle inserted
Figure 6.47 Example of Idle Cycle Operation (5)
6.9.2 Pin States in Idle Cycle
Table 6.11 shows the pin states in an idle cycle.
Table 6.11 Pin States in Idle Cycle
Pins
Pin State
A to A
23
0
D to D
15
0
CSn
Next cycle address value
High impedance
High*
UCAS, LCAS
High
AS
High
RD
High
HWR
High
LWR
High
Note: * Remains low in DRAM space RAS down mode.
Rev. 5.0, 09/04, page 189 of 978