3069RF-ZTAT Datasheet, PDF (293/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

Port 5 Data Register (P5DR): P5DR is an 8-bit readable/writable register that stores output data
for port 5. When port 5 functions as an output port, the value of this register is output. When a bit
in P5DDR is set to 1, if port 5 is read the value of the corresponding P5DR bit is returned. When a
bit in P5DDR is cleared to 0, if port 5 is read the corresponding pin logic level is read.
Bits 7 to 4 are reserved. They are fixed at 1, and cannot be modified.
Bit
Initial value
Read/Write
7
6
5
—
—
—
1
1
1
—
—
—
Reserved bits
4
3
2
1
0
—
P5 ₃
P5 ₂
P5 ₁
P5 ₀
1
0
0
0
0
—
R/W
R/W
R/W
R/W
Port 5 data 3 to 0
These bits store data
for port 5 pins
P5DR is initialized to H'F0 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
Port 5 Input Pull-Up MOS Control Register (P5PCR): P5PCR is an 8-bit readable/writable
register that controls the MOS input pull-up transistors in port 5.
Bits 7 to 4 are reserved. They are fixed at 1, and cannot be modified.
Bit
7
6
5
4
3
2
1
0
—
—
—
— P5₃PCR P5₂PCR P5₁PCR P5₀PCR
Initial value
1
1
1
1
0
0
0
0
Read/Write
—
—
—
—
R/W
R/W
R/W
R/W
Reserved bits
Port 5 input pull-up control 3 to 0
These bits control input pull-up
transistors built into port 5
In modes 5 and 7, when a P5DDR bit is cleared to 0 (selecting generic input), if the corresponding
bit in P5PCR is set to 1, the input pull-up transistor is turned on.
P5PCR is initialized to H'F0 by a reset and in hardware standby mode. In software standby mode
it retains its previous setting.
Table 8.9 summarizes the states of the input pull-ups in each mode.
Rev. 5.0, 09/04, page 271 of 978