3069RF-ZTAT Datasheet, PDF (162/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

6.3.5 Address Output Method
The H8/3069R provides a choice of two address update methods: either the same method as in the
previous H8/300H Series (address update mode 1), or a method in which address update is
restricted to external space accesses or self-refresh cycles (address update mode 2).
Figure 6.5 shows examples of address output in these two update modes.
On-chip
memory cycle
External
read cycle
On-chip
memory cycle
External
read cycle
On-chip
memory cycle
Address update
mode 1
Address update
mode 2
RD
Figure 6.5 Sample Address Output in Each Address Update Mode
(Basic Bus Interface, 3-State Space)
Address Update Mode 1: Address update mode 1 is compatible with the previous H8/300H
Series. Addresses are always updated between bus cycles.
Address Update Mode 2: In address update mode 2, address updating is performed only in
external space accesses or self-refresh cycles. In this mode, the address can be retained between
an external space read cycle and an instruction fetch cycle (on-chip memory) by placing the
program in on-chip memory. Address update mode 2 is therefore useful when connecting a
device that requires address hold time with respect to the rise of the RD strobe.
Switching between address update modes 1 and 2 is performed by means of the ADRCTL bit in
ADRCR. The initial value of ADRCR is the address update mode 1 setting, providing
compatibility with the previous H8/300H Series.
Rev. 5.0, 09/04, page 140 of 978