3069RF-ZTAT Datasheet, PDF (118/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

5.2.5 IRQ Sense Control Register (ISCR)
ISCR is an 8-bit readable/writable register that selects level sensing or falling-edge sensing of the
inputs at pins IRQ₅ to IRQ₀.
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
—
— IRQ5SC IRQ4SC IRQ3SC IRQ2SC IRQ1SC IRQ0SC
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reserved bits
IRQ ₅ to IRQ₀ sense control
These bits select level sensing or falling-edge
sensing for IRQ ₅ to IRQ ₀ interrupts
ISCR is initialized to H'00 by a reset and in hardware standby mode.
Bits 7 and 6—Reserved: These bits can be written and read, but they do not select level or
falling-edge sensing.
Bits 5 to 0—IRQ₅ to IRQ₀ Sense Control (IRQ5SC to IRQ0SC): These bits select whether
interrupts IRQ₅ to IRQ₀ are requested by level sensing of pins IRQ₅ to IRQ₀, or by falling-edge
sensing.
Bits 5 to 0
IRQ5SC to IRQ0SC Description
0
Interrupts are requested when IRQ to IRQ inputs are low (Initial value)
5
0
1
Interrupts are requested by falling-edge input at IRQ₅ to IRQ₀
Rev. 5.0, 09/04, page 96 of 978