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3069RF-ZTAT Datasheet, PDF (336/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER
Block Diagram of Channels 0 and 1: 16-bit timer channels 0 and 1 are functionally identical.
Both have the structure shown in figure 9.2.
TCLKA to TCLKD
φ, φ/2, φ/4, φ/8
Clock selector
Comparator
Control logic
TIOCA0
TIOCB0
IMIA0
IMIB0
OVI0
Module data bus
[Legend]
16TCNT: Timer counter (16 bits)
GRA, GRB: General registers A and B (input capture/output compare registers) (16 bits × 2)
TCR:
Timer control register (8 bits)
TIOR:
Timer I/O control register (8 bits)
Figure 9.2 Block Diagram of Channels 0 and 1
Rev. 5.0, 09/04, page 314 of 978