3069RF-ZTAT Datasheet, PDF (645/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

(d) The return value in the erasing program, FPFR (general register R0L) is judged.
(e) Determine whether erasure of the necessary blocks has finished.
If more than one block is to be erased, update the FEBS parameter and repeat steps (b) and (c).
Blocks that have already been erased can be erased again.
(f) After erasure finishes, clear FKEY and specify software protection.
If this LSI is restarted by a power-on reset immediately after user MAT erasure has finished,
secure a reset period (period of RES = 0) that is at least as long as normal 100 µs.
(4) Erasing and Programming Procedure in User Program Mode
By changing the on-chip RAM address of the download destination in FTDAR, the erasing
program and programming program can be downloaded to separate on-chip RAM areas.
Figure 18.13 shows an example of repetitively executing RAM emulation, erasing, and
programming.
Start procedure program
Set FTDAR to H'02
(Specify H'FFCF20 as
download destination)
Download erasing program
Initialize erasing program
Set FTDAR to H'03
(Specify H'FFBF20 as
download destination)
Download programming
program
1
Enter RAM emulation mode
and tune data
in on-chip RAM
Cancel RAM emulation mode
Erase relevant block
(execute erasing program)
Set FMPDR to H'FFE000 to
program relevant block
(execute programming
program)
Confirm operation
Initialize programming
program
1
End ?
No
Yes
End procedure program
Figure 18.13 Sample Procedure of Repeating RAM Emulation, Erasing, and Programming
(Overview)
Rev. 5.0, 09/04, page 623 of 978