3069RF-ZTAT Datasheet, PDF (469/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

12.3 Operation
Operations when the WDT is used as a watchdog timer and as an interval timer are described
below.
12.3.1 Watchdog Timer Operation
Figure 12.4 illustrates watchdog timer operation. To use the WDT as a watchdog timer, set the
WT/IT and TME bits to 1 in TCSR. Software must prevent TCNT overflow by rewriting the
TCNT value (normally by writing H'00) before overflow occurs. If TCNT fails to be rewritten and
overflows due to a system crash etc., the H8/3069R is internally reset for a duration of 518 states.
A watchdog reset has the same vector as a reset generated by input at the RES pin. Software can
distinguish a RES reset from a watchdog reset by checking the WRST bit in RSTCSR.
If a RES reset and a watchdog reset occur simultaneously, the RES reset takes priority.
H'FF
TCNT count
value
H'00
Internal
reset signal
Start
WDT overflow
TME set to 1
OVF = 1
H'00 written
in TCNT
Reset
H'00 written
in TCNT
518 states
Figure 12.4 Operation in Watchdog Timer Mode
Rev. 5.0, 09/04, page 447 of 978