3069RF-ZTAT Datasheet, PDF (101/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

4.5 Stack Status after Exception Handling
Figure 4.5 shows the stack after completion of trap instruction exception handling and interrupt
exception handling.
SP–4
SP–3
SP–2
SP–1
SP (ER7) ^→
Stack area
SP (ER7) →
SP+1
SP+2
SP+3
SP+4
CCR
CCR *²
PC _H
PC _L
Even address
Before exception handling
After exception handling
Pushed on stack
a. Normal mode*¹
SP–4
SP–3
SP–2
SP–1
SP (ER7) ^→
Stack area
SP (ER7) →
SP+1
SP+2
SP+3
SP+4
CCR
PC _E
PC _H
PC _L
Even address
Before exception handling
After exception handling
Pushed on stack
b. Advanced mode
[Legend]
PCE: Bits 23 to 16 of program counter (PC)
PCH: Bits 15 to 8 of program counter (PC)
PCL: Bits 7 to 0 of program counter (PC)
CCR: Condition code register
SP: Stack pointer
Notes: 1. Cannot be selected in H8/3069R
2. Ignored at return.
• PC indicates the address of the first instruction that will be executed after return.
• Registers must be saved in word or longword size at even addresses.
Figure 4.5 Stack after Completion of Exception Handling
Rev. 5.0, 09/04, page 79 of 978