3069RF-ZTAT Datasheet, PDF (175/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

φ
Address bus
CSn
AS
RD
Read access D15 to D8
D7 to D0
HWR
Write access
LWR
D15 to D8
D7 to D0
Bus cycle
T1
T2
External address in area n
Valid
Valid
Valid
Valid
Note: n = 7 to 0
Figure 6.16 Bus Control Signal Timing for 16-Bit, Two-State-Access Area (3)
(Word Access)
6.4.6 Wait Control
When accessing external space, the H8/3069R can extend the bus cycle by inserting one or more
wait states (T_w). There are two ways of inserting wait states: (1) program wait insertion and (2)
pin wait insertion using the WAIT pin.
Program Wait Insertion: From 0 to 3 wait states can be inserted automatically between the T₂
state and T₃ state on an individual area basis in three-state access space, according to the settings
of WCRH and WCRL.
Pin Wait Insertion: Setting the WAITE bit in BCR to 1 enables wait insertion by means of the
WAIT pin. When external space is accessed in this state, a program wait is first inserted. If the
WAIT pin is low at the falling edge of φ in the last T₂ or T_W state, another T_W state is inserted. If
the WAIT pin is held low, T_W states are inserted until it goes high.
Rev. 5.0, 09/04, page 153 of 978