3069RF-ZTAT Datasheet, PDF (452/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

11.3 Operation
11.3.1 Overview
When corresponding bits in PADDR or PBDDR and NDERA or NDERB are set to 1, TPC output
is enabled. The TPC output initially consists of the corresponding PADR or PBDR contents.
When a compare-match event selected in TPCR occurs, the corresponding NDRA or NDRB bit
contents are transferred to PADR or PBDR to update the output values.
Figure 11.2 illustrates the TPC output operation. Table 11.3 summarizes the TPC operating
conditions.
DDR
Q
NDER
Q
Output trigger signal
C
Q DR D
Q NDR D
Internal
data bus
TPC output pin
Figure 11.2 TPC Output Operation
Table 11.3 TPC Operating Conditions
NDER
0
1
DDR
0
1
0
1
Pin Function
Generic input port
Generic output port
Generic input port (but the DR bit is a read-only bit, and when compare
match occurs, the NDR bit value is transferred to the DR bit)
TPC pulse output
Sequential output of up to 16-bit patterns is possible by writing new output data to NDRA and
NDRB before the next compare match. For information on non-overlapping operation, see
section 11.3.4, Non-Overlapping TPC Output.
Rev. 5.0, 09/04, page 430 of 978