3069RF-ZTAT Datasheet, PDF (550/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

The following equation calculates the bit rate register (BRR) setting from the operating frequency
and bit rate. N is an integer from 0 to 255, specifying the value with the smaller error.
φ
N=
1488 • 2^2n–1 • B
• 10⁶ – 1
Table 14.6 BRR Settings for Typical Bit Rates (bits/s) (When n = 0)
bit/s
9600
10.00
N Error
1 30
10.7136 13.00
N Error N Error
1 25
1 8.99
φ (MHz)
14.2848 16.00 18.00
N Error N Error N Error
1 0.00 1 12.01 2 15.99
20.00
N Error
2 6.66
25.0
N Error
3 12.49
Table 14.7 Maximum Bit Rates for Various Frequencies (Smart Card Interface Mode)
φ (MHz)
Maximum Bit Rate (bits/s)
N
n
10.00
13441
0
0
10.7136
14400
0
0
13.00
17473
0
0
14.2848
19200
0
0
16.00
21505
0
0
18.00
24194
0
0
20.00
26882
0
0
25.00
33602
0
0
The bit rate error is given by the following equation:
Error (%) =
φ
• 10⁶ – 1 • 100
1488 • 2^2n-1 • B • (N + 1)
Rev. 5.0, 09/04, page 528 of 978