3069RF-ZTAT Datasheet, PDF (130/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

5.4.3 Interrupt Response Time
Table 5.5 indicates the interrupt response time from the occurrence of an interrupt request until
the first instruction of the interrupt service routine is executed.
Table 5.5 Interrupt Response Time
External Memory
No. Item
On-Chip
8-Bit Bus
Memory 2 States 3 States
16-Bit Bus
2 States 3 States
1 Interrupt priority
2*¹
2*¹
2*¹
decision
2*¹
2*¹
2 Maximum number
1 to 23*⁵ 1 to 27*⁵ *⁶ 1 to 41*⁴ *⁶ 1 to 23*⁵
1 to 25*⁴ *⁵
of states until end of
current instruction
3 Saving PC and CCR 4
8
12*⁴
4
6*⁴
to stack
4 Vector fetch
4
8
12*⁴
4
6*⁴
5 Instruction prefetch*² 4
8
12*⁴
4
6*⁴
6 Internal processing*³ 4
4
4
4
4
Total
19 to 41 31 to 57 43 to 83
19 to 41 25 to 49
Notes: 1. 1 state for internal interrupts.
2. Prefetch after the interrupt is accepted and prefetch of the first instruction in the
interrupt service routine.
3. Internal processing after the interrupt is accepted and internal processing after vector
fetch.
4. The number of states increases if wait states are inserted in external memory access.
5. The examples of DIVXS.W Rs,ERd, MULXS.W Rs,ERd.
6. The examples of MOV.L @(d:24,ERs), ERd, MOV.L ERs,@(d:24,ERd).
Rev. 5.0, 09/04, page 108 of 978