3069RF-ZTAT Datasheet, PDF (223/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

7.2.2 I/O Address Registers (IOAR)
An I/O address register (IOAR) is an 8-bit readable/writable register that specifies a source or
destination address. The IOAR value is the lower 8 bits of the address. The upper 16 address bits
are all 1 (H'FFFF).
Bit
7
6
5
4
3
2
1
0
Initial value
Read/Write
R/W
Undetermined
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Source or destination address
An IOAR functions as a source or destination address register depending on how the DMAC is
activated: as a destination address register if activation is by a receive-data-full interrupt from
serial communication interface (SCI) channel 0 or by an A/D converter conversion-end interrupt,
and as a source address register otherwise.
The IOAR value is held fixed. It is not incremented or decremented when a transfer is executed.
The IOARs are not initialized by a reset or in standby mode.
7.2.3 Execute Transfer Count Registers (ETCR)
An execute transfer count register (ETCR) is a 16-bit readable/writable register that specifies the
number of transfers to be executed. These registers function in one way in I/O mode and idle
mode, and another way in repeat mode.
• I/O mode and idle mode
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value
Undetermined
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Transfer counter
In I/O mode and idle mode, ETCR functions as a 16-bit counter. The count is decremented by
1 each time one transfer is executed. The transfer ends when the count reaches H'0000.
Rev. 5.0, 09/04, page 201 of 978