3069RF-ZTAT Datasheet, PDF (492/1003 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

Bit 7—Transmit Data Register Empty (TDRE): Indicates that the SCI has loaded transmit data
from TDR into TSR and the next serial data can be written in TDR.
Bit 7
TDRE
0
1
Description
TDR contains valid transmit data
[Clearing conditions]
Read TDRE when TDRE = 1, then write 0 in TDRE
The DMAC writes data in TDR
TDR does not contain valid transmit data
(Initial value)
[Setting conditions]
The chip is reset or enters standby mode
The TE bit in SCR is cleared to 0
TDR contents are loaded into TSR, so new data can be written in TDR
Bit 6—Receive Data Register Full (RDRF): Indicates that RDR contains new receive data.
Bit 6
RDRF
Description
0
RDR does not contain new receive data
(Initial value)
[Clearing conditions]
The chip is reset or enters standby mode
Read RDRF when RDRF = 1, then write 0 in RDRF
The DMAC reads data from RDR
1
RDR contains new receive data
[Setting condition]
Serial data is received normally and transferred from RSR to RDR
Note:
The RDR contents and the RDRF flag are not affected by detection of receive errors or by
clearing of the RE bit to 0 in SCR. They retain their previous values. If the RDRF flag is
still set to 1 when reception of the next data ends, an overrun error will occur and the
receive data will be lost.
Rev. 5.0, 09/04, page 470 of 978