DRA790 Datasheet, PDF (86/436 Pages) Texas Instruments – Infotainment Applications Processor

DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
www.ti.com
SIGNAL NAME
ljcb_clkn
ljcb_clkp
Table 4-16. PCIe Signal Descriptions (continued)
DESCRIPTION
PCIe1_PHY / PCIe2_PHY shared Reference Clock Input / Output Differential Pair
(negative)
PCIe1_PHY / PCIe2_PHY shared Reference Clock Input / Output Differential Pair
(positive)
TYPE
IODS
IODS
4.3.16 DCAN
BALL
AB9
AC8
NOTE
For more information, see the Serial Communication Interface / DCAN section of the device
TRM.
SIGNAL NAME
DCAN 1
dcan1_rx
dcan1_tx
DCAN 2
dcan2_rx
dcan2_tx
DESCRIPTION
Table 4-17. DCAN Signal Descriptions
DCAN1 receive data pin
DCAN1 transmit data pin
DCAN2 receive data pin
DCAN2 transmit data pin
4.3.17 GMAC_SW
TYPE
BALL
IO
H23, AC10
IO
H22
IO
E25, K22, AB10
IO
E24, H21
NOTE
For more information, see the Serial Communication Interfaces / Ethernet Controller section
of the device TRM.
SIGNAL NAME
rgmii0_rxc
rgmii0_rxctl
rgmii0_rxd0
rgmii0_rxd1
rgmii0_rxd2
rgmii0_rxd3
rgmii0_txc
rgmii0_txctl
rgmii0_txd0
rgmii0_txd1
rgmii0_txd2
rgmii0_txd3
rgmii1_rxc
rgmii1_rxctl
rgmii1_rxd0
rgmii1_rxd1
rgmii1_rxd2
rgmii1_rxd3
Table 4-18. GMAC Signal Descriptions
DESCRIPTION
RGMII0 Receive Clock
RGMII0 Receive Control
RGMII0 Receive Data
RGMII0 Receive Data
RGMII0 Receive Data
RGMII0 Receive Data
RGMII0 Transmit Clock
RGMII0 Transmit Enable
RGMII0 Transmit Data
RGMII0 Transmit Data
RGMII0 Transmit Data
RGMII0 Transmit Data
RGMII1 Receive Clock
RGMII1 Receive Control
RGMII1 Receive Data
RGMII1 Receive Data
RGMII1 Receive Data
RGMII1 Receive Data
TYPE
I
I
I
I
I
I
O
O
O
O
O
O
I
I
I
I
I
I
BALL
N2
P2
N4
N3
P1
N1
T4
T5
R1
R2
P3
P4
E11
F11
D13
C13
E13
B13
86
Terminal Configuration and Functions
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