DRA790 Datasheet, PDF (126/436 Pages) Texas Instruments – Infotainment Applications Processor

DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
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Table 5-1. Speed Grade Maximum Frequency⁽¹⁾
Device Speed
MPU
DRA79xxA
300
DRA79xxB
300
DRA79xxD
500
DRA79xxH
800
(1) N/A in this table stands for Not Applicable.
DSP
500
750
750
750
Maximum frequency (MHz)
IPU
L3
106.4
266
106.4
266
212.8
266
212.8
266
DDR3 / DDR3L
532 (DDR-1066)
532 (DDR 1066)
532 (DDR 1066)
667 (DDR-1333)
5.5.1 AVS and ABB Requirements
Adaptive Voltage Scaling (AVS) and Adaptive Body Biasing (ABB) are required on most of the vdd_*
supplies as defined in Table 5-2.
Supply
vdd
vdd_dsp
Table 5-2. AVS and ABB Requirements per vdd_* Supply
AVS Required?
Yes, for all OPPs
Yes, for all OPPs
ABB Required?
No
Yes, for all OPPs
5.5.2 Voltage And Core Clock Specifications
Table 5-3 shows the recommended OPP per voltage domain.
Table 5-3. Voltage Domains Operating Performance Points ⁽¹⁾
DOMAIN
VD_CORE (V) ⁽⁸⁾
VD_DSP (V) ⁽⁹⁾
CONDITION
BOOT (Before AVS is
enabled) ⁽⁵⁾
After AVS is enabled ⁽⁵⁾
BOOT (Before AVS is
enabled) ⁽⁵⁾
After AVS is enabled ⁽⁵⁾
MIN ⁽³⁾
1.11
OPP_NOM
NOM ⁽²⁾
1.15
MAX ⁽³⁾
1.2
AVS
Voltage
(6) _{– 3.5%}
1.02
AVS
Voltage
(6)
1.06
1.2
1.16
AVS
AVS
1.2
Voltage⁽⁶⁾ Voltage
– 3.5%
(6)
MIN ⁽³⁾
OPP_HIGH
NOM ⁽²⁾ MAX DC ⁽⁴⁾
Not Applicable
MAX ⁽³⁾
Not Applicable
Not Applicable
AVS
AVS
Voltage⁽⁶⁾ Voltage ⁽⁶⁾
– 3.5%
AVS
Voltage ⁽⁶⁾
+2%
AVS
Voltage⁽⁶⁾
+ 5%
(1) The voltage ranges in this table are preliminary, and final voltage ranges may be different than shown. Systems should be designed with
the ability to modify the voltage to comply with future recommendations.
(2) In a typical implementation, the power supply should target the NOM voltage.
(3) The voltage at the device ball should never be below the MIN voltage or above the MAX voltage for any amount of time. This
requirement includes dynamic voltage events such as AC ripple, voltage transients, voltage dips, etc.
(4) The DC voltage at the device ball should never be above the MAX DC voltage to avoid impact on device reliability and lifetime POH
(Power-On-Hours). The MAX DC voltage is defined as the highest allowed DC regulated voltage, without transients, seen at the ball.
(5) For all OPPs, AVS must be enabled to avoid impact on device reliability, lifetime POH (Power-On-Hours), and device power.
(6) The AVS voltages are device-dependent, voltage domain-dependent, and OPP-dependent. They must be read from the
STD_FUSE_OPP Registers. For information about STD_FUSE_OPP Registers address, please refer to Control Module Section of the
TRM. The power supply should be adjustable over the following ranges for each required OPP:
– OPP_NOM for DSP: 0.85 V – 1.15 V
– OPP_NOM for CORE: 0.85 V - 1.15 V
– OPP_HIGH: 1.05 V - 1.25 V
The AVS voltages will be within the above specified ranges.
(7) The power supply must be programmed with the AVS voltages for the CORE voltage domain, either just after the ROM boot or at the
earliest possible time in the secondary boot loader before there is significant activity seen on these domains.
(8) The package routes VD_CORE (vdd) to the VD_MPU, VD_SGX, VD_CORE and VD_RTC domains on the die.
(9) The package routes VD_DSP (vdd_dsp) to the VD_DSPEVE and VD_IVA domains on the die.
126 Specifications
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