DRA790 Datasheet, PDF (405/436 Pages) Texas Instruments – Infotainment Applications Processor

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DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
7.7.2 DDR3 Board Design and Layout Guidelines
7.7.2.1 Board Designs
TI only supports board designs using DDR3 memory that follow the guidelines in this document. The
switching characteristics and timing diagram for the DDR3 memory controller are shown in Table 7-24 and
Figure 7-37.
Table 7-24. Switching Characteristics Over Recommended Operating Conditions for DDR3 Memory
Controller
NO.
PARAMETER
MIN
MAX
UNIT
1 t_{c(DDR_CLK)}
Cycle time, DDR_CLK
1.5
2.5⁽¹⁾
ns
(1) This is the absolute maximum the clock period can be. Actual maximum clock period may be limited by DDR3 speed grade and
operating frequency (see the DDR3 memory device data sheet).
1
DDR_CLK
SPRS906_PCB_DDR3_01
Figure 7-37. DDR3 Memory Controller Clock Timing
7.7.2.2 DDR3 EMIF
The processor contains one DDR3 EMIF with one chip select.
7.7.2.3 DDR3 Device Combinations
Because there are several possible combinations of device counts and single- or dual-side mounting,
Table 7-25 summarizes the supported device configurations.
Table 7-25. Supported DDR3 Device Combinations
NUMBER OF DDR3 DEVICES DDR3 DEVICE WIDTH (BITS)
MIRRORED?
DDR3 EMIF WIDTH (BITS)
1
16
N
16
2
8
Y⁽¹⁾
16
2
16
N
32
2
16
Y⁽¹⁾
32
3
16
N⁽³⁾
32
4
8
N
32
4
8
Y⁽²⁾
32
5
8
N ⁽³⁾
32
(1) Two DDR3 devices are mirrored when one device is placed on the top of the board and the second device is placed on the bottom of
the board.
(2) This is two mirrored pairs of DDR3 devices.
(3) Three or five DDR3 device combination is not available on this device, but combination types are retained for consistency with the
DRA7xx family of devices.
7.7.2.4 DDR3 Interface Schematic
7.7.2.4.1 32-Bit DDR3 Interface
The DDR3 interface schematic varies, depending upon the width of the DDR3 devices used and the width
of the bus used (16 or 32 bits). General connectivity is straightforward and very similar. 16-bit DDR
devices look like two 8-bit devices. Figure 7-38 and Figure 7-39 show the schematic connections for 32-bit
interfaces using x16 devices.
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Applications, Implementation, and Layout 405
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