DRA790 Datasheet, PDF (4/436 Pages) Texas Instruments – Infotainment Applications Processor

DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
www.ti.com
Table of Contents
1 Device Overview ......................................... 1
1.1 Features .............................................. 1
1.2 Applications........................................... 2
1.3 Description............................................ 2
1.4 Functional Block Diagram ........................... 3
2 Revision History ......................................... 5
3 Device Comparison ..................................... 6
3.1 Device Comparison Table............................ 6
3.2 Related Products ..................................... 7
4 Terminal Configuration and Functions.............. 9
4.1 Pin Diagram .......................................... 9
4.2 Pin Attributes ......................................... 9
4.3 Signal Descriptions.................................. 68
4.4 Pin Multiplexing .................................... 106
4.5 Connections for Unused Pins...................... 120
5 Specifications ......................................... 121
5.1 Absolute Maximum Ratings........................ 122
5.2 ESD Ratings ....................................... 122
5.3 Power on Hour (POH) Limits ...................... 123
5.4 Recommended Operating Conditions ............. 123
5.5 Operating Performance Points..................... 125
5.6 Power Consumption Summary .................... 145
5.7 Electrical Characteristics........................... 145
5.8 Thermal Resistance Characteristics for CBD
Package............................................ 152
5.9 Timing Requirements and Switching
Characteristics ..................................... 153
6 Detailed Description.................................. 324
6.1 Description ......................................... 324
6.2 Functional Block Diagram ......................... 324
6.3 MPU................................................ 326
6.4 DSP Subsystem ................................... 329
6.5 IPU ................................................. 333
6.6 PRU-ICSS.......................................... 334
6.7 Memory Subsystem................................ 335
6.8 Interprocessor Communication .................... 338
6.9 Interrupt Controller................................. 338
6.10 EDMA .............................................. 339
6.11 Peripherals ......................................... 341
6.12 On-chip Debug..................................... 358
7 Applications, Implementation, and Layout ...... 361
7.1 Introduction ........................................ 361
7.2 Power Optimizations ............................... 362
7.3 Core Power Domains .............................. 373
7.4 Single-Ended Interfaces ........................... 383
7.5 Differential Interfaces .............................. 385
7.6 Clock Routing Guidelines .......................... 404
7.7 DDR3 Board Design and Layout Guidelines....... 404
8 Device and Documentation Support .............. 428
8.1 Device Nomenclature .............................. 428
8.2 Tools and Software ................................ 430
8.3 Documentation Support............................ 430
8.4 Related Links ...................................... 431
8.5 Receiving Notification of Documentation Updates. 431
8.6 Community Resources............................. 431
8.7 Trademarks ........................................ 431
8.8 Electrostatic Discharge Caution ................... 432
8.9 Export Control Notice .............................. 432
8.10 Glossary............................................ 432
9 Mechanical Packaging and Orderable
Information ............................................. 433
9.1 Mechanical Data ................................... 433
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Table of Contents
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