DRA790 Datasheet, PDF (313/436 Pages) Texas Instruments – Infotainment Applications Processor

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DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
Table 5-186. Manual Functions Mapping for PRU-ICSS1 PRU1 Direct Output mode (continued)
BALL
C13
D13
A9
A8
A11
F10
A10
B10
E10
BALL NAME
vin2a_d22
vin2a_d23
vin2a_d3
vin2a_d4
vin2a_d5
vin2a_d6
vin2a_d7
vin2a_d8
vin2a_d9
PR1_PRU1_DIR_OUT_MANUAL
A_DELAY (ps)
G_DELAY (ps)
0
0
0
400
0
2200
540
2800
0
400
0
1500
0
2200
0
2600
0
2300
CFG REGISTER
CFG_VIN2A_D22_OUT
CFG_VIN2A_D23_OUT
CFG_VIN2A_D3_OUT
CFG_VIN2A_D4_OUT
CFG_VIN2A_D5_OUT
CFG_VIN2A_D6_OUT
CFG_VIN2A_D7_OUT
CFG_VIN2A_D8_OUT
CFG_VIN2A_D9_OUT
MUXMODE
13
pr1_pru1_gpo19
pr1_pru1_gpo20
pr1_pru1_gpo0
pr1_pru1_gpo1
pr1_pru1_gpo2
pr1_pru1_gpo3
pr1_pru1_gpo4
pr1_pru1_gpo5
pr1_pru1_gpo6
Manual IO Timings Modes must be used to guaranteed some IO timings for PRU-ICSS1 PRU1 Parallel
Capture Mode. See Table 5-27 Modes Summary for a list of IO timings requiring the use of Manual IO
Timings Modes. See Table 5-187 Manual Functions Mapping for PRU-ICSS1 PRU1 Parallel Capture
Mode for a definition of the Manual modes.
Table 5-187 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in
the CFG_x registers.
BALL
D10
C10
B11
D11
C11
B12
A12
A13
E11
F11
A9
A8
A11
F10
A10
B10
E10
Table 5-187. Manual Functions Mapping for PRU-ICSS1 PRU1 Parallel Capture Mode
BALL NAME
vin2a_d10
vin2a_d11
vin2a_d12
vin2a_d13
vin2a_d14
vin2a_d15
vin2a_d16
vin2a_d17
vin2a_d18
vin2a_d19
vin2a_d3
vin2a_d4
vin2a_d5
vin2a_d6
vin2a_d7
vin2a_d8
vin2a_d9
PR1_PRU1_PAR_CAP_MANUAL
A_DELAY (ps)
G_DELAY (ps)
1535
0
1151
0
1173
0
970
0
1196
0
1286
0
1354
0
1331
0
2097
0
0
453
1566
0
1012
0
1337
0
1130
0
1202
0
1395
0
1338
0
CFG REGISTER
CFG_VIN2A_D10_IN
CFG_VIN2A_D11_IN
CFG_VIN2A_D12_IN
CFG_VIN2A_D13_IN
CFG_VIN2A_D14_IN
CFG_VIN2A_D15_IN
CFG_VIN2A_D16_IN
CFG_VIN2A_D17_IN
CFG_VIN2A_D18_IN
CFG_VIN2A_D19_IN
CFG_VIN2A_D3_IN
CFG_VIN2A_D4_IN
CFG_VIN2A_D5_IN
CFG_VIN2A_D6_IN
CFG_VIN2A_D7_IN
CFG_VIN2A_D8_IN
CFG_VIN2A_D9_IN
MUXMODE
12
pr1_pru1_gpi7
pr1_pru1_gpi8
pr1_pru1_gpi9
pr1_pru1_gpi10
pr1_pru1_gpi11
pr1_pru1_gpi12
pr1_pru1_gpi13
pr1_pru1_gpi14
pr1_pru1_gpi15
pr1_pru1_gpi16
pr1_pru1_gpi0
pr1_pru1_gpi1
pr1_pru1_gpi2
pr1_pru1_gpi3
pr1_pru1_gpi4
pr1_pru1_gpi5
pr1_pru1_gpi6
Manual IO Timings Modes must be used to guaranteed some IO timings for PRU-ICSS2 PRU0 IOSET2
Direct Input mode. See Table 5-27 Modes Summary for a list of IO timings requiring the use of Manual IO
Timings Modes. See Table 5-188 Manual Functions Mapping for PRU-ICSS2 PRU0 IOSET2 Direct Input
mode for a definition of the Manual modes.
Table 5-188 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in
the CFG_x registers.
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Specifications 313