DRA790 Datasheet, PDF (314/436 Pages) Texas Instruments – Infotainment Applications Processor

DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
www.ti.com
Table 5-188. Manual Functions Mapping for PRU-ICSS2 PRU0 IOSET2 Direct Input mode
BALL
Y5
Y6
F16
E19
A21
B21
D19
B22
B23
A23
Y2
Y1
Y4
AA2
AA3
W2
Y3
AA1
AA4
AB1
A22
BALL NAME
gpio6_10
gpio6_11
mcasp1_axr15
mcasp2_aclkx
mcasp2_axr2
mcasp2_axr3
mcasp2_fsx
mcasp3_axr0
mcasp3_axr1
mcasp3_fsx
mmc3_clk
mmc3_cmd
mmc3_dat0
mmc3_dat1
mmc3_dat2
mmc3_dat3
mmc3_dat4
mmc3_dat5
mmc3_dat6
mmc3_dat7
mcasp3_aclkx
PR2_PRU0_DIR_IN_MANUAL2
A_DELAY (ps)
G_DELAY (ps)
1000
3300
1000
3400
0
1300
0
800
0
1900
0
1400
0
1400
0
1400
0
1000
0
1300
1000
3700
1000
3500
1000
3500
1000
4000
1000
3300
1000
3900
1000
3500
1000
3600
1000
3500
1000
3100
0
0
CFG REGISTER
CFG_GPIO6_10_IN
CFG_GPIO6_11_IN
CFG_MCASP1_AXR15_IN
CFG_MCASP2_ACLKX_IN
CFG_MCASP2_AXR2_IN
CFG_MCASP2_AXR3_IN
CFG_MCASP2_FSX_IN
CFG_MCASP3_AXR0_IN
CFG_MCASP3_AXR1_IN
CFG_MCASP3_FSX_IN
CFG_MMC3_CLK_IN
CFG_MMC3_CMD_IN
CFG_MMC3_DAT0_IN
CFG_MMC3_DAT1_IN
CFG_MMC3_DAT2_IN
CFG_MMC3_DAT3_IN
CFG_MMC3_DAT4_IN
CFG_MMC3_DAT5_IN
CFG_MMC3_DAT6_IN
CFG_MMC3_DAT7_IN
CFG_MCASP3_ACLKX_IN
MUXMODE
12
pr2_pru0_gpi0
pr2_pru0_gpi1
pr2_pru0_gpi20
pr2_pru0_gpi18
pr2_pru0_gpi16
pr2_pru0_gpi17
pr2_pru0_gpi19
pr2_pru0_gpi14
pr2_pru0_gpi15
pr2_pru0_gpi13
pr2_pru0_gpi2
pr2_pru0_gpi3
pr2_pru0_gpi4
pr2_pru0_gpi5
pr2_pru0_gpi6
pr2_pru0_gpi7
pr2_pru0_gpi8
pr2_pru0_gpi9
pr2_pru0_gpi10
pr2_pru0_gpi11
pr2_pru0_gpi12
Manual IO Timings Modes must be used to guaranteed some IO timings for PRU-ICSS2 PRU0 IOSET2
Direct Output mode. See Table 5-27 Modes Summary for a list of IO timings requiring the use of Manual
IO Timings Modes. See Table 5-189 Manual Functions Mapping for PRU-ICSS2 PRU0 IOSET2 Direct
Output mode for a definition of the Manual modes.
Table 5-189 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in
the CFG_x registers.
Table 5-189. Manual Functions Mapping for PRU-ICSS2 PRU0 IOSET2 Direct Output mode
BALL
BALL NAME
Y5
gpio6_10
Y6
gpio6_11
F16
mcasp1_axr15
E19
mcasp2_aclkx
A21
mcasp2_axr2
B21
mcasp2_axr3
D19
mcasp2_fsx
A22
mcasp3_aclkx
B22
mcasp3_axr0
B23
mcasp3_axr1
A23
mcasp3_fsx
Y2
mmc3_clk
Y1
mmc3_cmd
Y4
mmc3_dat0
PR2_PRU0_DIR_OUT_MANUAL2
A_DELAY (ps)
G_DELAY (ps)
1800
1900
2500
2100
0
400
0
400
0
500
0
500
0
0
0
500
0
0
0
200
0
300
2100
2200
2300
2300
2000
1600
CFG REGISTER
CFG_GPIO6_10_OUT
CFG_GPIO6_11_OUT
CFG_MCASP1_AXR15_OUT
CFG_MCASP2_ACLKX_OUT
CFG_MCASP2_AXR2_OUT
CFG_MCASP2_AXR3_OUT
CFG_MCASP2_FSX_OUT
CFG_MCASP3_ACLKX_OUT
CFG_MCASP3_AXR0_OUT
CFG_MCASP3_AXR1_OUT
CFG_MCASP3_FSX_OUT
CFG_MMC3_CLK_OUT
CFG_MMC3_CMD_OUT
CFG_MMC3_DAT0_OUT
MUXMODE
13
pr2_pru0_gpo0
pr2_pru0_gpo1
pr2_pru0_gpo20
pr2_pru0_gpo18
pr2_pru0_gpo16
pr2_pru0_gpo17
pr2_pru0_gpo19
pr2_pru0_gpo12
pr2_pru0_gpo14
pr2_pru0_gpo15
pr2_pru0_gpo13
pr2_pru0_gpo2
pr2_pru0_gpo3
pr2_pru0_gpo4
314 Specifications
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