DRA790 Datasheet, PDF (187/436 Pages) Texas Instruments – Infotainment Applications Processor

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DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
SIGNALS
vout2_d9
vout2_d8
vout2_d7
vout2_d6
vout2_d5
vout2_d4
vout2_d3
vout2_d2
vout2_d1
vout2_d0
vout2_vsync
vout2_hsync
vout2_clk
vout2_fld
vout2_de
Table 5-39. VOUT2 IOSETs (continued)
BALL
C11
B12
A12
A13
E11
F11
B13
E13
C13
D13
B8
E8
C7
D8
B7
IOSET1
MUX
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
NOTE
To configure the desired virtual mode the user must set MODESELECT bit and
DELAYMODE bitfield for each corresponding pad control register.
The pad control registers are presented in Table 4-32 and described in Device TRM, Control
Module Chapter.
Virtual IO Timings Modes must be used to guaranteed some IO timings for VOUT3. See Table 5-27
Modes Summary for a list of IO timings requiring the use of Virtual IO Timings Modes. See Table 5-40
Virtual Functions Mapping for VOUT3 for a definition of the Virtual modes.
Table 5-40 presents the values for DELAYMODE bitfield.
BALL
B4
K4
D1
F1
C4
L2
E2
K3
J1
A3
M2
G3
H1
B3
B1
E1
Table 5-40. Virtual Functions Mapping for DSS VOUT3
BALL NAME
gpmc_ad15
gpmc_a8
gpmc_ad4
gpmc_ad0
gpmc_ad13
gpmc_a2
gpmc_ad1
gpmc_a4
gpmc_a6
gpmc_ad14
gpmc_a1
gpmc_cs3
gpmc_a9
gpmc_ad11
gpmc_ad6
gpmc_ad2
Delay Mode Value
DSS_VIRTUAL1
14
15
14
14
14
15
14
15
15
14
15
15
15
14
14
14
MUXMODE
3
vout3_d15
vout3_hsync
vout3_d4
vout3_d0
vout3_d13
vout3_d18
vout3_d1
vout3_d20
vout3_d22
vout3_d14
vout3_d17
vout3_clk
vout3_vsync
vout3_d11
vout3_d6
vout3_d2
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Specifications 187