DRA790 Datasheet, PDF (328/436 Pages) Texas Instruments – Infotainment Applications Processor

DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
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• Virtual CPU interface for virtualization support. This allows the majority of guest operating
system (OS) interactions with the GIC to be handled in hardware, but with physical interrupts
still requiring hypervisor intervention to assign them to the appropriate virtual machine.
– Integrated timer counter and one timer block
– ARM CoreSight ™ debug and trace modules. For more information, see chapter On-Chip Debug
Support of the Device TRM..
• MPU_AXI2OCP bridge (local interconnect):
– Connected to Memory Adapter (MPU_MA), which routes the non-EMIF address space transactions
to MPU_AXI2OCP
– Single request multiple data (SRMD) protocol on L3_MAIN port
– Multiple targets:
• 64-bit port to the L3_MAIN interconnect. Interface frequency is 1/4 or 1/8 of core frequency
• MPU_ROM
• Internal MPU subsystem peripheral targets, including Memory Adapter LISA Section Manager
(MA_LSM), wake-up generator (MPU_WUGEN), watchdog timer (MPU_WD_TIMER), and local
PRCM module (MPU_PRCM) configuration
• Internal AXI target, CoreSight System Trace Module (CS_STM)
• Memory adapter (MPU_MA): Helps decrease the latency of accesses between the MPU_L2CACHE
and the external memory interface (EMIF1) by providing a direct path between the MPU subsystem
and EMIF1:
– Connected to 128-bit AMBA4 interface of MPU_CLUSTER
– Direct 128-bit interface to EMIF1
– Interface speed between MPU_CLUSTER and MPU_MA is at half-speed of the MPU core
frequency
– Quarter-speed interface to EMIF
– Uses firewall logic to check access rights of incoming addresses
• Local PRCM (MPU_PRCM):
– Handles MPU_C0 power domain
– Supports SR3-APG (SmartReflex3 Automatic Power Gating) power management technology inside
the MPU_CLUSTER
– MPU subsystem has five power domains
• Wake-up generator (MPU_WUGEN)
– Responsible for waking up the MPU core
• Standby controller: Handles the power transitions inside the MPU subsystem
• Realtime (master) counter (COUNTER_REALTIME): Produces the count used by the private timer
peripheral in the MPU_CLUSTER
• Watchdog timer (MPU_WD_TIMER): Used to generate a chip-level watchdog reset request to global
PRCM
• On-chip boot ROM (MPU_ROM): The MPU_ROM size is 48-KiB, and the address range is from
0x4003 8000 to 0x4004 3FFF. For more information about booting from this memory, see chapter
Initialization of the Device TRM..
328 Detailed Description
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