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DRA790 Datasheet, PDF (277/436 Pages) Texas Instruments – Infotainment Applications Processor
www.ti.com
DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
(1) P = output mmc1_clk period in ns
SDR501
SDR502L
SDR502H
mmc1_clk
SDR503
SDR504
mmc1_cmd
SDR507
SDR508
mmc1_dat[3:0]
SPRS906_TIMING_MMC1_09
Figure 5-83. MMC/SD/SDIO in - High Speed SDR50 - Receiver Mode
mmc1_clk
mmc1_cmd
mmc1_dat[3:0]
SDR501
SDR502H
SDR502L
SDR505
SDR505
SDR506
SDR506
SPRS906_TIMING_MMC1_10
Figure 5-84. MMC/SD/SDIO in - High Speed SDR50 - Transmitter Mode
5.9.6.21.1.6 UHS-I SDR104, 4-bit data, half-cycle
Table 5-126 presents Timing requirements and Switching characteristics for MMC1 - SDR104 in receiver
and transmitter mode (see Figure 5-85 and Figure 5-86).
Table 5-126. Switching Characteristics for MMC1 - SD Card SDR104 Mode
NO. PARAMETER
DESCRIPTION
SDR1041 fop(clk)
Operating frequency, mmc1_clk
SDR1042 tw(clkH)
H
Pulse duration, mmc1_clk high
SDR1042 tw(clkL)
L
Pulse duration, mmc1_clk low
SDR1045 td(clkL-cmdV)
SDR1046 td(clkL-dV)
Delay time, mmc1_clk falling clock edge to mmc1_cmd transition
Delay time, mmc1_clk falling clock edge to mmc1_dat[3:0] transition
(1) P = output mmc1_clk period in ns
MIN
0.5 × P-
0.185 (1)
0.5 × P-
0.185 (1)
-1.09
-1.09
MAX
192
0.49
0.49
UNIT
MHz
ns
ns
ns
ns
SDR1041
SDR1042L
SDR1042H
mmc1_clk
SDR1043
SDR1044
mmc1_cmd
SDR1047
SDR1048
mmc1_dat[3:0]
SPRS906_TIMING_MMC1_11
Figure 5-85. MMC/SD/SDIO in - High Speed SDR104 - Receiver Mode
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Specifications 277