DRA790 Datasheet, PDF (257/436 Pages) Texas Instruments – Infotainment Applications Processor

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miin_rxclk
1
2
DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
4
3
4
SPRS906_TIMING_GMAC_MIIRXCLK_01
Figure 5-65. Clock Timing (GMAC Receive) - MIIn operation
Table 5-89 and Figure 5-66 present timing requirements for MIIn in transmit operation.
Table 5-89. Timing Requirements for miin_txclk - MII Operation
NO.
PARAMETER
DESCRIPTION
1
t_{c(TX_CLK)}
Cycle time, miin_txclk
2
t_{w(TX_CLKH)}
Pulse duration, miin_txclk high
3
t_{w(TX_CLKL)}
Pulse duration, miin_txclk low
4
t_{t(TX_CLK)}
Transition time, miin_txclk
SPEED
MIN
10 Mbps
400
100 Mbps
40
10 Mbps
140
100 Mbps
14
10 Mbps
140
100 Mbps
14
10 Mbps
100 Mbps
MAX
260
26
260
26
3
3
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
1
2
4
3
miin_txclk
4
SPRS906_TIMING_GMAC_MIITXCLK_02
Figure 5-66. Clock Timing (GMAC Transmit) - MIIn operation
Table 5-90 and Figure 5-67 present timing requirements for GMAC MIIn Receive 10/100Mbit/s.
Table 5-90. Timing Requirements for GMAC MIIn Receive 10/100 Mbit/s
NO.
1
2
PARAMETER
t_{su(RXD-RX_CLK)}
t_{su(RX_DV-RX_CLK)}
t_{su(RX_ER-RX_CLK)}
t_{h(RX_CLK-RXD)}
t_{h(RX_CLK-RX_DV)}
t_{h(RX_CLK-RX_ER)}
DESCRIPTION
Setup time, receive selected signals valid before miin_rxclk
Hold time, receive selected signals valid after miin_rxclk
MIN
MAX
8
8
UNIT
ns
ns
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Specifications 257