DRA790 Datasheet, PDF (294/436 Pages) Texas Instruments – Infotainment Applications Processor

DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
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Table 5-157. Switching Characteristics for MMC3 - SDR50 Mode ⁽²⁾ (continued)
NO. PARAMETER
DESCRIPTION
SDR505 t_d(clkL-cmdV)
SDR506 t_d(clkL-dV)
Delay time, mmc3_clk falling clock edge to mmc3_cmd transition
Delay time, mmc3_clk falling clock edge to mmc3_dat[i:0] transition
(1) P = output mmc3_clk period in ns
(2) i in [i:0] = 7
MIN
-3.66
-3.66
MAX
1.46
1.46
UNIT
ns
ns
SDR501
SDR502L
SDR502H
mmcj_clk
mmcj_cmd
SDR503
SDR507
SDR504
SDR508
mmcj_dat[7:0]
SPRS906_TIMING_MMC3_05
Figure 5-104. MMC/SD/SDIOj in - High Speed SDR50 - Receiver Mode
mmcj_clk
mmcj_cmd
mmcj_dat[7:0]
SDR501
SDR502H
SDR502L
SDR505
SDR505
SDR506
SDR506
SPRS906_TIMING_MMC3_06
Figure 5-105. MMC/SD/SDIOj in - High Speed SDR50 - Transmitter Mode
NOTE
To configure the desired Manual IO Timing Mode the user must follow the steps described in
section Manual IO Timing Modes of the Device TRM.
The associated registers to configure are listed in the CFG REGISTER column. For more
information see the Control Module chapter in the Device TRM.
Manual IO Timings Modes must be used to guaranteed some IO timings for MMC3. See Table 5-27
Modes Summary for a list of IO timings requiring the use of Manual IO Timings Modes. See Table 5-158
Manual Functions Mapping for MMC3 for a definition of the Manual modes.
Table 5-158 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in
the CFG_x registers.
BALL
Y2
Y2
Y1
Y1
Y1
Y4
BALL NAME
mmc3_clk
mmc3_clk
mmc3_cmd
mmc3_cmd
mmc3_cmd
mmc3_dat0
Table 5-158. Manual Functions Mapping for MMC3
MMC3_MANUAL1
A_DELAY (ps)
G_DELAY (ps)
1085
21
1269
0
0
0
128
0
98
0
0
0
CFG REGISTER
CFG_MMC3_CLK_IN
CFG_MMC3_CLK_OUT
CFG_MMC3_CMD_IN
CFG_MMC3_CMD_OEN
CFG_MMC3_CMD_OUT
CFG_MMC3_DAT0_IN
MUXMODE
0
mmc3_clk
mmc3_clk
mmc3_cmd
mmc3_cmd
mmc3_cmd
mmc3_dat0
294 Specifications
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