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DRA790 Datasheet, PDF (260/436 Pages) Texas Instruments – Infotainment Applications Processor
DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
MDCLK
1
MDIO2
MDIO6
MDIO
(input)
MDIO3
MDIO4
MDIO5
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MDIO6
MDIO
(output)
MDIO7
Figure 5-69. GMAC MDIO diagrams
SPRS906_TIMING_GMAC_MDIO_05
In Table 5-95 are presented the specific groupings of signals (IOSET) for use with GMAC MDIO signals.
SIGNALS
mdio_d
mdio_mclk
Table 5-95. GMAC MDIO IOSETs
IOSET7
BALL
MUX
C10
3
D10
3
IOSET8
BALL
MUX
L6
0
L5
0
IOSET9
BALL
MUX
Y6
1
Y5
1
IOSET10
BALL
MUX
E25
5
E24
5
5.9.6.19.3 GMAC RMII Timings
The main reference clock REF_CLK (RMII_50MHZ_CLK) of RMII interface is internally supplied from
PRCM. The source of this clock could be either externally sourced from the RMII_MHZ_50_CLK pin of the
device or internally generated from DPLL_GMAC output clock GMAC_RMII_HS_CLK. Please see the
PRCM chapter of the device TRM for full details about RMII reference clock.
CAUTION
The I/O Timings provided in this section are valid only for some GMAC usage
modes when the corresponding Virtual I/O Timings or Manual I/O Timings are
configured as described in the tables found in this section.
Table 5-96, Table 5-97 and Figure 5-70 present timing requirements for GMAC RMIIn Receive.
Table 5-96. Timing Requirements for GMAC REF_CLK - RMII Operation
NO.
PARAMETER
RMII1
RMII2
RMII3
RMII4
tc(REF_CLK)
tw(REF_CLKH)
tw(REF_CLKL)
ttt(REF_CLK)
DESCRIPTION
Cycle time, REF_CLK
Pulse duration, REF_CLK high
Pulse duration, REF_CLK low
Transistion time, REF_CLK
MIN
MAX
20
7
13
7
13
3
UNIT
ns
ns
ns
ns
260 Specifications
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