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| DRA790 Datasheet, PDF (415/436 Pages) Texas Instruments – Infotainment Applications Processor | |||
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www.ti.com
DRA790, DRA791
DRA793, DRA797
SPRS968A â AUGUST 2016 â REVISED FEBRUARY 2017
DDR Address and Control Input Buffers
Processor
Address and Control
Output Buffer
Address and Control
Terminator
Rtt
A1
A2
A3
A4
A3
AT
VTT
Figure 7-43. ADDR_CTRL Topology for Four x8 DDR3 Devices
SPRS906_PCB_DDR3_07
7.7.2.15.1.2 CK and ADDR_CTRL Routing, Four DDR3 Devices
Figure 7-44 shows the CK routing for four DDR3 devices placed on the same side of the PCB. Figure 7-45
shows the corresponding ADDR_CTRL routing.
DDR_1V5
Rcp
Cac
A2
A3
A4
A3
AT
A2
A3
A4
A3
AT
Rcp
0.1 µF
=
SPRS906_PCB_DDR3_08
Figure 7-44. CK Routing for Four Single-Side DDR3 Devices
Copyright © 2016â2017, Texas Instruments Incorporated
Applications, Implementation, and Layout 415
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Product Folder Links: DRA790 DRA791 DRA793 DRA797
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