DRA790 Datasheet, PDF (264/436 Pages) Texas Instruments – Infotainment Applications Processor

DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
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(1) For RGMII, receive selected signals include: rgmiin_rxd[3:0] and rgmiin_rxctl.
rgmiin_rxc^(A)
rgmiin_rxd[3:0]^(B)
1
2
3
4
4
5
1st Half-byte
2nd Half-byte
6
RGRXD[3:0] RGRXD[7:4]
rgmiin_rxctl^(B)
RXDV
RXERR
SPRS906_TIMING_GMAC_RGMIIRX_08
A. rgmiin_rxc must be externally delayed relative to the data and control pins.
B. Data and control information is received using both edges of the clocks. rgmiin_rxd[3:0] carries data bits 3-0 on the
rising edge of rgmiin_rxc and data bits 7-4 on the falling edge ofrgmiin_rxc. Similarly, rgmiin_rxctl carries RXDV on
rising edge of rgmiin_rxc and RXERR on falling edge of rgmiin_rxc.
Figure 5-72. GMAC Receive Interface Timing, RGMIIn operation
Table 5-105, Table 5-106 and Figure 5-73 present switching characteristics for transmit - RGMIIn for
10/100/1000Mbit/s.
Table 5-105. Switching Characteristics Over Recommended Operating Conditions for rgmiin_txctl -
RGMIIn Operation for 10/100/1000 Mbit/s
NO. PARAMETER
1
t_c(TXC)
DESCRIPTION
Cycle time, rgmiin_txc
2
t_w(TXCH)
Pulse duration, rgmiin_txc high
3
t_w(TXCL)
Pulse duration, rgmiin_txc low
4
t_t(TXC)
Transition time, rgmiin_txc
SPEED
10 Mbps
100 Mbps
1000 Mbps
10 Mbps
100 Mbps
1000 Mbps
10 Mbps
100 Mbps
1000 Mbps
10 Mbps
100 Mbps
1000 Mbps
MIN MAX UNIT
360
440
ns
36
44
ns
7.2
8.8
ns
160
240
ns
16
24
ns
3.6
4.4
ns
160
240
ns
16
24
ns
3.6
4.4
ns
0.75
ns
0.75
ns
0.75
ns
264 Specifications
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