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| DRA790 Datasheet, PDF (259/436 Pages) Texas Instruments – Infotainment Applications Processor | |||
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DRA790, DRA791
DRA793, DRA797
SPRS968A â AUGUST 2016 â REVISED FEBRUARY 2017
SIGNALS
mii0_txd1
mii0_txd0
mii0_rxd3
mii0_rxd2
mii0_rxd1
mii0_rxd0
mii0_txclk
mii0_txer
mii0_rxer
mii0_rxdv
mii0_crs
mii0_col
mii0_rxclk
mii0_txen
Table 5-92. GMAC MII IOSETs (continued)
BALL
IOSET5
MUX
BALL
N3
N4
T4
T5
R2
R1
N2
L6
P3
N5
P4
L5
N6
P1
5.9.6.19.2 GMAC MDIO Interface Timings
IOSET6
MUX
3
3
3
3
3
3
3
3
3
3
3
3
3
3
CAUTION
The I/O Timings provided in this section are valid only for some GMAC usage
modes when the corresponding Virtual I/O Timings or Manual I/O Timings are
configured as described in the tables found in this section.
Table 5-93, Table 5-93 and Figure 5-69 present timing requirements for MDIO.
No
MDIO1
MDIO2
MDIO3
MDIO4
MDIO5
PARAMETER
tc(MDC)
tw(MDCH)
tw(MDCL)
tsu(MDIO-MDC)
th(MDIO_MDC)
Table 5-93. Timing Requirements for MDIO Input
DESCRIPTION
MIN
Cycle time, MDC
400
Pulse Duration, MDC High
160
Pulse Duration, MDC Low
160
Setup time, MDIO valid before MDC High
90
Hold time, MDIO valid from MDC High
0
MAX
UNIT
ns
ns
ns
ns
ns
Table 5-94. Switching Characteristics Over Recommended Operating Conditions for MDIO Output
NO
MDIO6
MDIO7
PARAMETER
tt(MDC)
td(MDC-MDIO)
DESCRIPTION
Transition time, MDC
Delay time, MDC High to MDIO valid
MIN
MAX
UNIT
5
ns
10
390
ns
Copyright © 2016â2017, Texas Instruments Incorporated
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Product Folder Links: DRA790 DRA791 DRA793 DRA797
Specifications 259
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