DRA790 Datasheet, PDF (13/436 Pages) Texas Instruments – Infotainment Applications Processor

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BALL NUMBER
[1]
BALL NAME [2]
F8
cap_vbbldo_dsp
T7
cap_vbbldo_gpu
G14
cap_vbbldo_iva
F17
cap_vbbldo_mpu
U20
cap_vddram_core1
K7
cap_vddram_core3
G19
cap_vddram_core4
L7
cap_vddram_dsp
V7
cap_vddram_gpu
G12
cap_vddram_iva
G18
cap_vddram_mpu
AC1
csi2_0_dx0
AD1
csi2_0_dx1
AE2
csi2_0_dx2
AB2
csi2_0_dy0
AC2
csi2_0_dy1
AD2
csi2_0_dy2
H23
dcan1_rx
H22
dcan1_tx
AC18
AE19
ddr1_a0
ddr1_a1
SIGNAL NAME [3]
cap_vbbldo_dsp
cap_vbbldo_gpu
cap_vbbldo_iva
cap_vbbldo_mpu
cap_vddram_core1
cap_vddram_core3
cap_vddram_core4
cap_vddram_dsp
cap_vddram_gpu
cap_vddram_iva
cap_vddram_mpu
csi2_0_dx0
csi2_0_dx1
csi2_0_dx2
csi2_0_dy0
csi2_0_dy1
csi2_0_dy2
dcan1_rx
uart8_txd
mmc2_sdwp
hdmi1_cec
gpio1_15
Driver off
dcan1_tx
uart8_rxd
mmc2_sdcd
hdmi1_hpd
gpio1_14
Driver off
ddr1_a0
ddr1_a1
DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
Table 4-1. Pin Attributes⁽¹⁾
Support [4]
MUXMODE
[5]
TYPE [6]
BALL
RESET
STATE [7]
BALL
RESET
REL.
STATE [8]
BALL
RESET
REL.
MUXMODE
[9]
I/O
VOLTAGE
VALUE
[10]
POWER
[11]
HYS [12]
BUFFER
TYPE [13]
PULL
UP/DOWN
TYPE [14]
DSIS [15]
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
CAP
0
I
1.8
Yes
LVCMOS PU/PD
CSI2
0
I
1.8
Yes
LVCMOS PU/PD
CSI2
0
I
1.8
Yes
LVCMOS PU/PD
CSI2
0
I
1.8
Yes
LVCMOS PU/PD
CSI2
0
I
1.8
Yes
LVCMOS PU/PD
CSI2
0
I
1.8
Yes
LVCMOS PU/PD
CSI2
0
IO
PU
PU
15
1.8/3.3
vddshv3 Yes
Dual
PU/PD
1
2
O
Voltage
LVCMOS
3
I
0
6
IO
14
IO
15
I
0
IO
PU
PU
15
1.8/3.3
vddshv3 Yes
Dual
PU/PD
1
2
I
Voltage
LVCMOS
1
3
I
1
6
IO
14
IO
15
I
0
O
PD
drive 1
(OFF)
1.2/1.5
vdds_ddr1 No
LVCMOS PUx/PDy
DDR
0
O
PD
drive 1
(OFF)
1.2/1.5
vdds_ddr1 No
LVCMOS PUx/PDy
DDR
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Terminal Configuration and Functions
13