DRA790 Datasheet, PDF (334/436 Pages) Texas Instruments – Infotainment Applications Processor

DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
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• Emulation/debug: Emulation feature embedded in Cortex-M4
• L2 MMU (IPUx_MMU): 32 entries with table walking logic
• Wake-up generator (IPUx_WUGEN): Generates wake-up request from external interrupts
• Power management:
– Local power-management control: Configurable through the IPUx_WUGEN registers.
– Three sleep modes supported, controlled by the local power-management module.
– IPUx is clock-gated in all sleep modes.
– IPUx_Cx_INTC interrupt interface stays awake.
For more information, see chapter Dual Cortex-M4 IPU Subsystem of the device TRM.
6.6 PRU-ICSS
The device Programmable Real-Time Unit and Industrial Communication Subsystem (PRU-ICSS) consists
of dual 32-bit Load / Store RISC CPU cores - Programmable Real-Time Units (PRU0 and PRU1), shared,
data, and instruction memories, internal peripheral modules, and an interrupt controller (PRU-ICSS_INTC).
The programmable nature of the PRUs, along with their access to pins, events and all SoC resources,
provides flexibility in implementing fast real-time responses, specialized data handling operations,
customer peripheral interfaces, and in off-loading tasks from the other processor cores of the system-on-
chip (SoC).
The each PRU-ICSS includes the following main features:
• 21x Enhanced GPIs (EGPIs) and 21x Enhanced GPOs (EGPOs) with asynchronous capture and serial
support per each PRU CPU core
• One Ethernet MII_RT module (PRU-ICSS_MII_RT) with two MII ports and configurable connections to
PRUs
• 1 MDIO Port (PRU-ICSS_MII_MDIO)
• One Industrial Ethernet Peripheral (IEP) to manage/generate Industrial Ethernet functions
• 1 x 16550-compatible UART with a dedicated 192 MHz clock to support 12Mbps Profibus
• 1 Industrial Ethernet timer with 7/9 capture and 8 compare events
• 1 Enhanced Capture Module (ECAP)
• 1 Interrupt Controller (PRU-ICSS_INTC)
• A flexible power management support
• Integrated switched central resource with programmable priority
• Parity control supported by all memories
For more information, see chapter Programmable Real-Time Unit Subsystem and Industrial
Communication Subsystem (PRU-ICSS) of the device TRM.
334 Detailed Description
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