DRA790 Datasheet, PDF (274/436 Pages) Texas Instruments – Infotainment Applications Processor

DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
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(1) P = output mmc1_clk period in ns
mmc1_clk
mmc1_cmd
mmc1_dat[3:0]
HSSD1
HSSD2L
HSSD3
HSSD7
HSSD2H
HSSD4
HSSD8
Figure 5-77. MMC/SD/SDIO in - High Speed - Receiver Mode
SPRS906_TIMING_MMC1_03
mmc1_clk
mmc1_cmd
mmc1_dat[3:0]
HSSD1
HSSD2H
HSSD2L
HSSD5
HSSD5
HSSD6
HSSD6
Figure 5-78. MMC/SD/SDIO in - High Speed - Transmitter Mode
SPRS906_TIMING_MMC1_04
5.9.6.21.1.3 SDR12, 4-bit data, half-cycle
Table 5-120 and Table 5-121 present Timing requirements and Switching characteristics for MMC1 -
SDR12 in receiver and transmitter mode (see Figure 5-79 and Figure 5-80).
Table 5-120. Timing Requirements for MMC1 - SD Card SDR12 Mode
NO. PARAMETER
SDR12 t_{su(cmdV-clkH)}
5
SDR12 t_h(clkH-cmdV)
6
SDR12 t_su(dV-clkH)
7
SDR12 t_h(clkH-dV)
8
DESCRIPTION
Setup time, mmc1_cmd valid before mmc1_clk rising
clock edge
Hold time, mmc1_cmd valid after mmc1_clk rising
clock edge
Setup time, mmc1_dat[3:0] valid before mmc1_clk
rising clock edge
Hold time, mmc1_dat[3:0] valid after mmc1_clk rising
clock edge
MODE
MIN
25.99
Pad Loopback Clock
Internal Loopback Clock
1.6
1.6
25.99
Pad Loopback Clock
1.6
Internal Loopback Clock 1.6
MAX UNIT
ns
ns
ns
ns
ns
ns
Table 5-121. Switching Characteristics for MMC1 - SD Card SDR12 Mode
NO. PARAMETER
SDR120 fop(clk)
SDR121 t_w(clkH)
SDR122 t_w(clkL)
SDR123 t_d(clkL-cmdV)
SDR124 t_d(clkL-dV)
DESCRIPTION
Operating frequency, mmc1_clk
Pulse duration, mmc1_clk high
Pulse duration, mmc1_clk low
Delay time, mmc1_clk falling clock edge to mmc1_cmd transition
Delay time, mmc1_clk falling clock edge to mmc1_dat[3:0] transition
MIN
0.5 × P-
0.185 ⁽¹⁾
0.5 × P-
0.185⁽¹⁾
-19.13
-19.13
MAX
24
16.93
16.93
UNIT
MHz
ns
ns
ns
ns
274 Specifications
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