DRA790 Datasheet, PDF (301/436 Pages) Texas Instruments – Infotainment Applications Processor

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DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
Table 5-168. PRU-ICSS ECAT Timing Requirements – Input Validated With SYNCx
NO.
1
2
3
PARAMETER
t_{w(EDC_SYNCx_OUT)}
t_{su(EDIO_DATA_IN-}
EDC_SYNCx_OUT)
t_{h(EDC_SYNCx_OUT-}
EDIO_DATA_IN)
DESCRIPTION
Pulse width, EDC_SYNCx_OUT
Setup time, EDIO_DATA_IN valid before EDC_SYNCx_OUT active
edge
Hold time, EDIO_DATA_IN valid after EDC_SYNCx_OUT active edge
MIN
100.00
20.00
20.00
MAX
UNIT
ns
ns
ns
EDC_SYNCx_OUT
1
EDIO_DATA_IN[7:0]
2
3
SPRS91x_TIMING_PRU_ECAT_02
Figure 5-116. PRU-ICSS ECAT Input Validated With SYNCx Timing
Table 5-169. PRU-ICSS ECAT Timing Requirements – Input Validated With Start of Frame (SOF)
NO. PARAMETER
1
t_{w(EDIO_SOF)}
2
t_{su(EDIO_DATA_IN-}
EDIO_SOF)
3
t_{h(EDIO_SOF-}
EDIO_DATA_IN)
(1) ICSS_IEP_CLK clock period
DESCRIPTION
Pulse duration, EDIO_SOF
Setup time, EDIO_DATA_IN valid before EDIO_SOF active edge
Hold time, EDIO_DATA_IN valid after EDIO_SOF active edge
MIN
4 × P ⁽¹⁾
20.00
MAX
5 × P ⁽¹⁾
UNIT
ns
ns
20.00
ns
EDIO_SOF
1
EDIO_DATA_IN[7:0]
2
3
SPRS91x_TIMING_PRU_ECAT_03
Figure 5-117. PRU-ICSS ECAT Input Validated With SOF
Table 5-170. PRU-ICSS ECAT Timing Requirements - LATCHx_IN
NO.
1
PARAMETER
t_{w(EDC_LATCHx_IN)}
DESCRIPTION
Pulse duration, EDC_LATCHx_IN
MIN
3 × P ⁽¹⁾
MAX UNIT
ns
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Specifications 301