DRA790 Datasheet, PDF (169/436 Pages) Texas Instruments – Infotainment Applications Processor

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5.9.4.3.3 DPLL and DLL Noise Isolation
DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
NOTE
For more information on DPLL and DLL decoupling capacitor requirements, see the External
Capacitors / Voltage Decoupling Capacitors / I/O and Analog Voltage Decoupling / VDDA
Power Domain section.
5.9.5 Recommended Clock and Control Signal Transition Behavior
All clocks and control signals must transition between V_IH and V_IL (or between V_IL and V_IH) in a monotonic
manner. Monotonic transitions are more easily guaranteed with faster switching signals. Slower input
transitions are more susceptible to glitches due to noise and special care should be taken for slow input
clocks.
5.9.6 Peripherals
5.9.6.1 Timing Test Conditions
All timing requirements and switching characteristics are valid over the recommended operating conditions
unless otherwise specified.
5.9.6.2 Virtual and Manual I/O Timing Modes
Some of the timings described in the following sections require the use of Virtual or Manual I/O Timing
Modes. Table 5-27 provides a summary of the Virtual and Manual I/O Timing Modes across all device
interfaces. The individual interface timing sections found later in this document provide the full description
of each applicable Virtual and Manual I/O Timing Mode. Refer to the "Pad Configuration" section of the
TRM for the procedure on implementing the Virtual and Manual Timing Modes in a system.
Table 5-27. Modes Summary
Virtual or Manual IO Mode Name
DPI Video Output
No Virtual or Manual IO Timing Mode Required
DSS_VIRTUAL1
VOUT2_IOSET1_MANUAL1
VOUT2_IOSET1_MANUAL2
VOUT2_IOSET1_MANUAL3
VOUT3_MANUAL1
GPMC
No Virtual or Manual IO Timing Mode Required
GPMC_VIRTUAL1
McASP
No Virtual or Manual IO Timing Mode Required
MCASP1_VIRTUAL1_SYNC_RX
MCASP1_VIRTUAL2_ASYNC_RX
No Virtual or Manual IO Timing Mode Required
MCASP2_VIRTUAL1_SYNC_RX_80M
MCASP2_VIRTUAL2_ASYNC_RX
MCASP2_VIRTUAL3_SYNC_RX
MCASP2_VIRTUAL4_ASYNC_RX_80M
No Virtual or Manual IO Timing Mode Required
MCASP3_VIRTUAL2_SYNC_RX
No Virtual or Manual IO Timing Mode Required
Data Manual Timing Mode
DPI3 Video Output Default Timings - Rising-edge Clock Reference
DPI3 Video Output Default Timings - Falling-edge Clock Reference
DPI2 Video Output IOSET1 Alternate Timings
DPI2 Video Output IOSET1 Default Timings - Rising-edge Clock Reference
DPI2 Video Output IOSET1 Default Timings - Falling-edge Clock Reference
DPI3 Video Output Alternate Timings
GPMC Asynchronous Mode Timings and Synchronous Mode - Default Timings
GPMC Synchronous Mode - Alternate Timings
McASP1 Asynchronous and Synchronous Transmit Timings
See Table 5-73
See Table 5-73
McASP2 Asynchronous and Synchronous Transmit Timings
See Table 5-74
See Table 5-74
See Table 5-74
See Table 5-74
McASP3 Synchronous Transmit Timings
See Table 5-75
McASP4 Synchronous Transmit Timings
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Specifications 169