DRA790 Datasheet, PDF (161/436 Pages) Texas Instruments – Infotainment Applications Processor

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DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
Table 5-15. OSC0 Crystal Electrical Characteristics (continued)
NAME
DESCRIPTION
Ethernet and MLB not used
t_j(xiosc0)
Frequency accuracy⁽¹⁾, xi_osc0
Ethernet RGMII and RMII
using derived clock
Ethernet MII using derived
clock
MLB using derived clock
(1) Crystal characteristics should account for tolerance+stability+aging.
MIN TYP MAX UNIT
±200
±50
ppm
±100
±50
When selecting a crystal, the system design must consider the temperature and aging characteristics of a
based on the worst case environment and expected life expectancy of the system.
Table 5-16 details the switching characteristics of the oscillator and the requirements of the input clock.
NAME
f_p
t_sX
Table 5-16. Oscillator Switching Characteristics—Crystal Mode
DESCRIPTION
Oscillation frequency
Start-up time
MIN
TYP
19.2, 20, 27 MHz
MAX
4
UNIT
MHz
ms
5.9.4.1.2 OSC0 Input Clock
A 1.8-V LVCMOS-Compatible Clock Input can be used instead of the internal oscillator to provide the
SYS_CLKIN1 clock input to the system. The external connections to support this are shown in Figure 5-
10. The xi_osc0 pin is connected to the 1.8-V LVCMOS-Compatible clock source. The xi_osc0 pin is left
unconnected. The vssa_osc0 pin is connected to board ground (VSS).
Device
xi_osc0
xo_osc0
vssa_osc0
NC
SPRS906_CLK_04
Figure 5-10. 1.8-V LVCMOS-Compatible Clock Input
Table 5-17 summarizes the OSC0 input clock electrical characteristics.
NAME
f
C_IN
I_IN
Table 5-17. OSC0 Input Clock Electrical Characteristics—Bypass Mode
DESCRIPTION
Frequency
Input capacitance
Input current (3.3V mode)
MIN
2.184
4
TYP
19.2, 20, 27
2.384
6
MAX
2.584
10
UNIT
MHz
pF
µA
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Specifications 161