DRA790 Datasheet, PDF (297/436 Pages) Texas Instruments – Infotainment Applications Processor

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DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
(1) ICSS_CLK clock period
1
GPI[m:0]
(1) m in GPI[m:0] = 20
2
Figure 5-106. PRU-ICSS PRU Direct Input Timing
SPRS91x_TIMING_PRU_01
Table 5-160. PRU-ICSS PRU Switching Requirements – Direct Output Mode
NO. PARAMETER
1
t_w(GPO)
2
t_sk(GPO)
(1) ICSS_CLK clock period
DESCRIPTION
Pulse width, GPO
Skew between GPO[20:0] signals
MIN
2 × P ⁽¹⁾
MAX
4.5
UNIT
ns
ns
1
GPO[n:0]
(1) n in GPO[n:0] = 20
2
Figure 5-107. PRU-ICSS PRU Direct Output Timing
5.9.6.23.1.2 PRU-ICSS PRU Parallel Capture Mode Electrical Data and Timing
SPRS91x_TIMING_PRU_02
Table 5-161. PRU-ICSS PRU Timing Requirements - Parallel Capture Mode
NO.
1
2
3
4
5
PARAMETER
t_w(CLOCKIN)
t_{w(CLOCKIN_L)}
t_{w(CLOCKIN_H)}
t_{su(DATAIN-CLOCKIN)}
t_{h(CLOCKIN-DATAIN)}
DESCRIPTION
Cyle time, CLOCKIN
Pulse duration, CLOCKIN low
Pulse duration, CLOCKIN high
Setup time, DATAIN valid before CLOCKIN
Hold time, DATAIN valid after CLOCKIN
MIN
MAX UNIT
20
ns
9
11 ns
9
11 ns
4.5
ns
0
ns
CLOCKIN
1
3
2
DATAIN
4
5
SPRS91x_TIMING_PRU_03
Figure 5-108. PRU-ICSS PRU Parallel Capture Timing - Rising Edge Mode
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Specifications 297