DRA790 Datasheet, PDF (255/436 Pages) Texas Instruments – Infotainment Applications Processor

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DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
5.9.6.18 DCAN
The device provides two DCAN interfaces for supporting distributed realtime control with a high level of
security. The DCAN interfaces implement the following features:
• Supports CAN protocol version 2.0 part A, B
• Bit rates up to 1 MBit/s
• 64 message objects
• Individual identifier mask for each message object
• Programmable FIFO mode for message objects
• Programmable loop-back modes for self-test operation
• Suspend mode for debug support
• Software module reset
• Automatic bus on after Bus-Off state by a programmable 32-bit timer
• Direct access to Message RAM during test mode
• CAN Rx/Tx pins are configurable as general-purpose IO pins
• Two interrupt lines (plus additional parity-error interrupts line)
• RAM initialization
• DMA support
NOTE
For more information, see the DCAN section of the Device TRM.
NOTE
The Controller Area Network Interface x (x = 1 to 2) is also referred to as DCANx.
Table 5-86, Table 5-87 and Figure 5-64 present timing and switching characteristics for DCANx Interface.
Table 5-86. Timing Requirements for DCANx Receive⁽¹⁾
NO. PARAMETER
DESCRIPTION
f(baud)
Maximum programmable baud rate
1 t_w(DCANRX)
Pulse duration, receive data bit (DCANx_RX)
(1) H = period of baud rate, 1/programmed baud rate.
MIN
H - 15
NOM
MAX
1
H + 15
UNIT
Mbps
ns
Table 5-87. Switching Characteristics Over Recommended Operating Conditions for DCANx Transmit ⁽¹⁾
NO. PARAMETER
DESCRIPTION
f(baud)
Maximum programmable baud rate
2 t_w(DCANTX)
Pulse duration, transmit data bit (DCANx_TX)
(1) H = period of baud rate, 1/programmed baud rate.
MIN
H - 15
MAX
1
H + 15
UNIT
Mbps
ns
1
DCANx_RX
2
DCANx_TX
Figure 5-64. DCANx Timings
SPRS906_TIMING_DCAN_01
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