DRA790 Datasheet, PDF (262/436 Pages) Texas Instruments – Infotainment Applications Processor

DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
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In Table 5-100 are presented the specific groupings of signals (IOSET) for use with GMAC RMII signals.
SIGNALS
RMII_MHZ_50_CLK
rmii1_txd1
rmii1_txd0
rmii1_rxd1
rmii1_rxd0
rmii1_rxer
rmii1_txen
rmii1_crs
rmii0_txd1
rmii0_txd0
rmii0_rxd1
rmii0_rxd0
rmii0_txen
rmii0_rxer
rmii0_crs
Table 5-100. GMAC RMII IOSETs
BALL
P5
P2
N1
T4
T5
N6
N2
N5
IOSET1
MUX
0
2
2
2
2
2
2
2
BALL
P5
IOSET2
MUX
0
N3
1
N4
1
R2
1
R1
1
P1
1
P3
1
P4
1
Manual IO Timings Modes must be used to guaranteed some IO timings for GMAC. See Table 5-27
Modes Summary for a list of IO timings requiring the use of Manual IO Timings Modes. See Table 5-101
Manual Functions Mapping for GMAC RMII0 for a definition of the Manual modes.
Table 5-101 lists the A_DELAY and G_DELAY values needed to calculate the correct values to be set in
the CFG_x registers.
BALL
P5
R1
R2
P3
P4
Table 5-101. Manual Functions Mapping for GMAC RMII0
BALL NAME
RMII_MHZ_50_CLK
rgmii0_txd0
rgmii0_txd1
rgmii0_txd2
rgmii0_txd3
GMAC_RMII0_MANUAL1
A_DELAY
(ps)
G_DELAY
(ps)
0
0
2444
804
2453
981
2356
847
2415
993
CFG REGISTER
MUXMODE
0
1
CFG_RMII_MHZ_50_CLK_IN
CFG_RGMII0_TXD0_IN
CFG_RGMII0_TXD1_IN
CFG_RGMII0_TXD2_IN
CFG_RGMII0_TXD3_IN
RMII_MHZ_50_CLK
rmii0_rxd0
rmii0_rxd1
rmii0_rxer
rmii0_crs
Manual IO Timings Modes must be used to guaranteed some IO timings for GMAC. See Table 5-27
Modes Summary for a list of IO timings requiring the use of Manual IO Timings Modes. See Table 5-102
Manual Functions Mapping for GMAC RMII1 for a definition of the Manual modes.
Table 5-102 list the A_DELAY and G_DELAY values needed to calculate the correct values to be set in
the CFG_x registers.
BALL
P5
T5
T4
Table 5-102. Manual Functions Mapping for GMAC RMII1
BALL NAME
RMII_MHZ_50_CLK
rgmii0_txctl
rgmii0_txc
GMAC_RMII1_MANUAL1
A_DELAY
(ps)
G_DELAY
(ps)
0
0
2450
909
2327
926
CFG REGISTER
MUXMODE
0
2
CFG_RMII_MHZ_50_CLK_IN
CFG_RGMII0_TXCTL_IN
CFG_RGMII0_TXC_IN
RMII_MHZ_50_CLK
rmii1_rxd0
rmii1_rxd1
262 Specifications
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