DRA790 Datasheet, PDF (349/436 Pages) Texas Instruments – Infotainment Applications Processor

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DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
• McASP8 module supporting 2 channels with independent TX/RX clock/sync domain
For more information, see section Multichannel Audio Serial Port (McASP) in chapter Serial
Communication Interfaces of the device TRM.
6.11.9 USB
SuperSpeed USB DRD Subsystem has three instances in the device providing the following functions:
• USB1: SuperSpeed (SS) USB 3.0 Dual-Role-Device (DRD) subsystem with integrated SS (USB3.0)
PHY and HS/FS (USB2.0) PHY
• USB2: High-Speed (HS) USB 2.0 Dual-Role-Device (DRD) subsystem with integrated HS/FS PHY
• USB3: HS USB 2.0 Dual-Role-Device (DRD) subsystem with ULPI (SDR) interface to external HS/FS
PHYs
SuperSpeed USB DRD Subsystem has the following features:
• Dual-role-device (DRD) capability:
– Supports USB Peripheral (or Device) mode at speeds SS (5Gbps)(USB1 only), HS (480 Mbps),
and FS (12 Mbps)
– Supports USB Host mode at speeds SS (5Gbps)(USB1 only), HS (480 Mbps), FS (12 Mbps), and
LS (1.5 Mbps)
– USB static peripheral operation
– USB static host operation
– Flexible stream allocation
– Stream priority
– External Buffer Control
• Each instance contains single xHCI controller with the following features:
– Internal DMA controller
– Descriptor caching and data prefetching
– Interrupt moderation and blocking
– Power management USB3.0 states for U0, U1, U2, and U3
– Dynamic FIFO memory allocation for all endpoints
– Supports all modes of transfers (control, bulk, interrupt, and isochronous)
– Supports high bandwidth ISO mode
• Connects to an external charge pump for VBUS 5 V generation
• USB-HS PHY (USB2PHY1 and USB2PHY2 for USB1 and USB2, respectively): contain the USB
functions, drivers, receivers, and pads for correct D+/D– signalling
• USB3PHY. The USB3PHY is embedded in the USB1 subsystem and contains:
– USB3RX_PHY deserializer to receive data at SuperSpeed mode
– USB3TX_PHY serializer to transmit data at SuperSpeed mode
– Power sequencer that contains a power control state machine, generating the sequences to power
up/down the USB3RX_PHY/USB3TX_PHY
– Dedicated DPLL (DPLL_USB_OTG_SS)
For more information, see section SuperSpeed USB DRD (USB) in chapter Serial Communication
Interfaces of the device TRM.
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Detailed Description 349