DRA790 Datasheet, PDF (123/436 Pages) Texas Instruments – Infotainment Applications Processor

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DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
5.3 Power on Hour (POH) Limits
IP
Duty Cycle Voltage Domain Voltage (V) (max) Frequency (MHz)
(max)
Tj(°C)
POH
All
100%
All
All Support OPPs
Automotive Profile⁽⁴⁾
20000
(1) The information in the section below is provided solely for your convenience and does not extend or modify the warranty provided under
TI’s standard terms and conditions for TI semiconductor products.
(2) POH is a functional of voltage, temperature and time. Usage at higher voltages and temperatures will result in a reduction in POH to
achieve the same reliability performance. For assessment of alternate use cases, contact your local TI representative.
(3) Unless specified in the table above, all voltage domains and operating conditions are supported in the device at the noted temperatures.
(4) Automotive profile is defined as 20000 power on hours with junction temperature as follows: 5%@-40°C, 65%@70°C, 20%@110°C,
10%@125°C.
5.4 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
PARAMETER
DESCRIPTION
MIN ⁽²⁾
Input Power Supply Voltage Range
vdd
Core voltage domain supply
vdd_dsp
DSP voltage domain supply
vdda_usb1
DPLL_USB and HS USB1 1.8V
1.71
analog power supply
Maximum noise (peak-peak)
vdda_usb2
HS USB2 1.8V analog power supply
1.71
Maximum noise (peak-peak)
vdda33v_usb1
HS USB1 3.3V analog power supply.If
USB1 is not used, this pin can
alternatively be connected to VSS if
the following requirements are met:
- The usb1_dm/usb1_dp pins are left
unconnected
- The USB1 PHY is kept powered
down
3.135
Maximum noise (peak-peak)
vdda33v_usb2
HS USB2 3.3V analog power supply. If
USB2 is not used, this pin can
alternatively be connected to VSS if
the following requirements are met:
- The usb2_dm/usb2_dp pins are left
unconnected
- The USB2 PHY is kept powered
down
3.135
Maximum noise (peak-peak)
vdda_per
PER PLL and PER HSDIVIDER
1.71
analog power supply
Maximum noise (peak-peak)
vdda_ddr
DPLL_DDR and DDR HSDIVIDER
1.71
analog power supply
Maximum noise (peak-peak)
vdda_debug
DPLL_DEBUG analog power supply
1.71
Maximum noise (peak-peak)
vdda_core_gmac
DPLL_CORE and CORE HSDIVIDER
1.71
analog power supply
Maximum noise (peak-peak)
vdda_gpu
DPLL_GPU analog power supply
1.71
Maximum noise (peak-peak)
NOM MAX DC ⁽³⁾
See Section 5.5
See Section 5.5
1.80
1.836
50
1.80
1.836
50
3.3
3.366
MAX ⁽²⁾
UNIT
V
V
1.89
V
1.89
3.465
mV_PPmax
V
mV_PPmax
V
50
mV_PPmax
3.3
3.366
3.465
V
50
1.80
1.836
50
1.80
1.836
50
1.80
1.836
50
1.80
1.836
50
1.80
1.836
50
1.89
mV_PPmax
V
1.89
mV_PPmax
V
1.89
1.89
mV_PPmax
V
mV_PPmax
V
1.89
mV_PPmax
V
mV_PPmax
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Specifications 123