English
Language : 

DRA790 Datasheet, PDF (237/436 Pages) Texas Instruments – Infotainment Applications Processor
www.ti.com
DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
Table 5-70. Switching Characteristics Over Recommended Operating Conditions for McASP1(1)
NO.
9
10
PARAMETER
tc(AHCLKRX)
tw(AHCLKRX)
DESCRIPTION
Cycle time, AHCLKR/X
Pulse duration, AHCLKR/X high or low
MODE
11
tc(ACLKRX)
12
tw(ACLKRX)
Cycle time, ACLKR/X
Pulse duration, ACLKR/X high or low
13
td(ACLK-AFSXR)
Delay time, ACLKR/X transmit edge to AFSX/R output valid
14
td(ACLK-AXR)
Delay time, ACLKR/X transmit edge to AXR output valid
(1) ACLKR internal: ACLKRCTL.CLKRM=1, PDIR.ACLKR = 1
ACLKR external input: ACLKRCTL.CLKRM=0, PDIR.ACLKR=0
ACLKR external output: ACLKRCTL.CLKRM=0, PDIR.ACLKR=1
ACLKX internal: ACLKXCTL.CLKXM=1, PDIR.ACLKX = 1
ACLKX external input: ACLKXCTL.CLKXM=0, PDIR.ACLKX=0
ACLKX external output: ACLKXCTL.CLKXM=0, PDIR.ACLKX=1
(2) P = AHCLKR/X period in ns.
(3) R = ACLKR/X period in ns.
ACLKR/X int
ACLKR/X ext in
ACLKR/X ext out
ACLKR/X int
ACLKR/X ext in
ACLKR/X ext out
MIN
20
0.5P -
2.5 (2)
20
0.5P -
2.5 (3)
-0.9
2
-1.4
2
MAX
6
23.1
6
24.2
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
Table 5-71. Switching Characteristics Over Recommended Operating Conditions for McASP2 (1)
NO.
9
10
PARAMETER
tc(AHCLKRX)
tw(AHCLKRX)
DESCRIPTION
Cycle time, AHCLKR/X
Pulse duration, AHCLKR/X high or low
MODE
11
tc(ACLKRX)
12
tw(ACLKRX)
Cycle time, ACLKR/X
Pulse duration, ACLKR/X high or low
13
td(ACLK-AFSXR)
Delay time, ACLKR/X transmit edge to AFSX/R output valid
14
td(ACLK-AXR)
Delay time, ACLKR/X transmit edge to AXR output valid
(1) ACLKR internal: ACLKRCTL.CLKRM=1, PDIR.ACLKR = 1
ACLKR external input: ACLKRCTL.CLKRM=0, PDIR.ACLKR=0
ACLKR external output: ACLKRCTL.CLKRM=0, PDIR.ACLKR=1
ACLKX internal: ACLKXCTL.CLKXM=1, PDIR.ACLKX = 1
ACLKX external input: ACLKXCTL.CLKXM=0, PDIR.ACLKX=0
ACLKX external output: ACLKXCTL.CLKXM=0, PDIR.ACLKX=1
(2) P = AHCLKR/X period in ns.
(3) R = ACLKR/X period in ns.
ACLKR/X int
ACLKR/X ext in
ACLKR/X ext out
ACLKR/X int
ACLKR/X ext in
ACLKR/X ext out
MIN
20
0.5P -
2.5 (2)
20
0.5P -
2.5 (3)
-1
2
-1.3
2
MAX
6
23.2
6
23.7
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
Table 5-72. Switching Characteristics Over Recommended Operating Conditions for
McASP3/4/5/6/7/8(1)
NO.
9
10
PARAMETER
tc(AHCLKRX)
tw(AHCLKRX)
11
tc(ACLKRX)
DESCRIPTION
Cycle time, AHCLKR/X
Pulse duration, AHCLKR/X high or low
Cycle time, ACLKR/X
MODE
MIN
20
0.5P -
2.5 (2)
20
MAX
UNIT
ns
ns
ns
Copyright © 2016–2017, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: DRA790 DRA791 DRA793 DRA797
Specifications 237