DRA790 Datasheet, PDF (302/436 Pages) Texas Instruments – Infotainment Applications Processor

DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
(1) ICSS_IEP_CLK clock period
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EDC_LATCHx_IN
1
Figure 5-118. PRU-ICSS ECAT LATCHx_IN Timing
SPRS91x_TIMING_PRU_ECAT_04
Table 5-171. PRU-ICSS ECAT Switching Requirements - Digital IOs
NO. PARAMETER
1
t_{w(EDIO_OUTVALID)}
2
t_{d(EDIO_OUTVALID-}
EDIO_DATA_OUT)
1
t_{sk(EDIO_DATA_OUT)}
(1) ICSS_IEP_CLK clock period
DESCRIPTION
Pulse duration, EDIO_OUTVALID
Delay time, EDIO_OUTVALID to EDIO_DATA_OUT
EDIO_DATA_OUT skew
MIN
14 × P ⁽¹⁾
0.00
MAX
32 × P ⁽¹⁾
18 × P ⁽¹⁾
8
UNIT
ns
ns
ns
5.9.6.23.3 PRU-ICSS MII_RT and Switch
5.9.6.23.3.1 PRU-ICSS MDIO Electrical Data and Timing
Table 5-172. PRU-ICSS MDIO Timing Requirements – MDIO_DATA
NO. PARAMETER
DESCRIPTION
MIN
1
t_su(MDIO-MDC)
Setup time, MDIO valid before MDC high
90
2
t_h(MDIO-MDC)
Hold time, MDIO valid from MDC high
0
MAX
UNIT
ns
ns
1
2
MDIO_CLK (Output)
MDIO_DATA (Input)
Figure 5-119. PRU-ICSS MDIO_DATA Timing - Input Mode
SPRS91x_TIMING_PRU_MII_RT_01
Table 5-173. PRU-ICSS MDIO Switching Characteristics - MDIO_CLK
NO. PARAMETER
DESCRIPTION
MIN
1
t_c(MDC)
Cycle time, MDC
400
2
t_w(MDCH)
Pulse duration, MDC high
160
3
t_w(MDCL)
Pulse duration, MDC low
160
4
t_t(MDC)
Transition time, MDC
MAX
5
UNIT
ns
ns
ns
ns
302 Specifications
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