DRA790 Datasheet, PDF (1/436 Pages) Texas Instruments – Infotainment Applications Processor

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DRA790, DRA791
DRA793, DRA797
SPRS968A – AUGUST 2016 – REVISED FEBRUARY 2017
DRA79x Infotainment Applications Processor
1 Device Overview
1.1 Features
1
• Architecture Designed for Infotainment Co-
Processor Applications, Hybrid Radio and Amplifier
Applications
• ARM® Cortex®-A15 Microprocessor Subsystem
• C66x Floating-Point VLIW DSP
– Fully Object-Code Compatible With C67x and
C64x+
– Up to Thirty-two 16 × 16-Bit Fixed-Point
Multiplies per Cycle
• Up to 512KB of On-Chip L3 RAM
• Level 3 (L3) and Level 4 (L4) Interconnects
• DDR3/DDR3L Memory Interface (EMIF) Module
– Supports up to DDR-1333 (667 MHz)
– Up to 2GB Across Single Chip Select
• Dual ARM® Cortex®-M4 Image Processing Units
(IPU)
• Display Subsystem
– Display Controller With DMA Engine and up to
Three Pipelines
– HDMI™ Encoder: HDMI 1.4a and DVI 1.0
Compliant
• Video Processing Engine (VPE)
• One Video Input Port (VIP) Module
– Support for up to Four Multiplexed Input Ports
• General-Purpose Memory Controller (GPMC)
• Enhanced Direct Memory Access (EDMA)
Controller
• 2-Port Gigabit Ethernet (GMAC)
– Up to Two External Ports
• Sixteen 32-Bit General-Purpose Timers
• 32-Bit MPU Watchdog Timer
• Six High-Speed Inter-Integrated Circuit (I²C) Ports
• HDQ™/1-Wire® Interface
• Ten Configurable UART/IrDA/CIR Modules
• Four Multichannel Serial Peripheral Interfaces
(McSPI)
• Quad SPI Interface (QSPI)
• Media Local Bus Subsystem (MLBSS)
• Eight Multichannel Audio Serial Port (McASP)
Modules
• SuperSpeed USB 3.0 Dual-Role Device
• High-Speed USB 2.0 Dual-Role Device
• High-Speed USB 2.0 On-The-Go
• Four MultiMedia Card/Secure Digital/Secure Digital
Input Output Interfaces (MMC/SD/SDIO)
• PCI Express® 3.0 Subsystems With Two 5-Gbps
Lanes
– One 2-lane Gen2-Compliant Port
– or Two 1-lane Gen2-Compliant Ports
• Dual Controller Area Network (DCAN) Modules
– CAN 2.0B Protocol
• MIPI® CSI-2 Camera Serial Interface
• Up to 186 General-Purpose I/O (GPIO) Pins
• Power, Reset, and Clock Management
• On-Chip Debug With CTools Technology
• 28-nm CMOS Technology
• 17 mm × 17 mm, 0.65-mm Pitch, 538-Pin BGA
(CBD)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. ADVANCE INFORMATION for pre-production products; subject to
change without notice.